Large-Pore Ordered Mesoporous Turbostratic Carbon Films Prepared Using Rapid Thermal Annealing for High-Performance Micro-pseudocapacitors

2021 ◽  
Author(s):  
Ayush Bhardwaj ◽  
James Nicolas Pagaduan ◽  
Yong-Guen Yu ◽  
Vincent J. Einck ◽  
Sravya Nuguri ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
High Performance ◽  
Carbon Films ◽  
Turbostratic Carbon ◽  
Large Pore ◽  
Ordered Mesoporous

High Performance 0.2 µm Dual Gate Complementary MOS Technologies by Suppression of Transient-Enhanced-Diffusion using Rapid Thermal Annealing

1998 ◽  
Vol 37 (Part 1, No. 3B) ◽  
pp. 1054-1058 ◽  
Author(s):  
Yukio Nishida ◽  
Hirokazu Sayama ◽  
Satoshi Shimizu ◽  
Takashi Kuroi ◽  
Akihiko Furukawa ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
High Performance ◽  
Enhanced Diffusion ◽  
Transient Enhanced Diffusion ◽  
Dual Gate

scholarly journals Highly aligned, large pore ordered mesoporous carbon films by solvent vapor annealing with soft shear

Carbon ◽  
2015 ◽  
Vol 82 ◽  
pp. 51-59 ◽  
Author(s):  
Zhe Qiang ◽  
Yuanzhong Zhang ◽  
Yi Wang ◽  
Sarang M. Bhaway ◽  
Kevin A. Cavicchi ◽  
...  
Keyword(s):  
Mesoporous Carbon ◽  
Carbon Films ◽  
Ordered Mesoporous Carbon ◽  
Solvent Vapor ◽  
Large Pore ◽  
Ordered Mesoporous ◽  
Vapor Annealing ◽  
Solvent Vapor Annealing

scholarly journals Formation and Device Application of Ge Nanowire Heterostructures via Rapid Thermal Annealing

2011 ◽  
Vol 2011 ◽  
pp. 1-16 ◽  
Author(s):  
Jianshi Tang ◽  
Chiu-Yen Wang ◽  
Faxian Xiu ◽  
Yi Zhou ◽  
Lih-Juann Chen ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Field Effect ◽  
High Performance ◽  
Lattice Mismatch ◽  
Field Effect Transistors ◽  
Single Crystalline ◽  
Nanowire Transistors ◽  
Nanowire Heterostructures

We reviewed the formation of Ge nanowire heterostructure and its field-effect characteristics by a controlled reaction between a single-crystalline Ge nanowire and Ni contact pads using a facile rapid thermal annealing process. Scanning electron microscopy and transmission electron microscopy demonstrated a wide temperature range of 400~500°C to convert the Ge nanowire to a single-crystalline Ni2Ge/Ge/Ni2Ge nanowire heterostructure with atomically sharp interfaces. More importantly, we studied the effect of oxide confinement during the formation of nickel germanides in a Ge nanowire. In contrast to the formation of Ni2Ge/Ge/Ni2Ge nanowire heterostructures, a segment of high-quality epitaxial NiGe was formed between Ni2Ge with the confinement of Al2O3during annealing. A twisted epitaxial growth mode was observed in both two Ge nanowire heterostructures to accommodate the large lattice mismatch in the NixGe/Ge interface. Moreover, we have demonstrated field-effect transistors using the nickel germanide regions as source/drain contacts to the Ge nanowire channel. Our Ge nanowire transistors have shown a high-performancep-type behavior with a high on/off ratio of 105and a field-effect hole mobility of 210 cm2/Vs, which showed a significant improvement compared with that from unreacted Ge nanowire transistors.

Effect of rapid thermal annealing: red and blue shift in photoluminescence of GaNAs grown by RF plasma-assisted molecular beam epitaxy

2001 ◽  
Vol 692 ◽  
Author(s):  
W. K. Loke ◽  
S. F. Yoon ◽  
T. K. Ng ◽  
S. Z. Wang ◽  
W. J. Fan
Keyword(s):  
Molecular Beam Epitaxy ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
High Performance ◽  
Molecular Beam ◽  
Rf Plasma ◽  
Growth Surface ◽  
Significant Implication ◽  
Reciprocal Space Mapping ◽  
Direction Parallel

AbstractRapid thermal annealing (RTA) of 1000Å GaNAs films grown on (100) oriented GaAs substrate by radio frequency (RF) plasma assisted solid-source molecular beam epitaxy was studied by low-temperature photoluminescence (PL) and high-resolution x-ray diffraction (HRXRD). Samples with nitrogen content of 13 and 2.2% have shown an overall blueshift in energy of 67.7meV and an intermediate redshift of 42.2meV in the PL spectra when subjected to RTA at 525–850°C for 10min. It is also shown that the sample, which is annealed at temperature range of 700–750°C, has the highest photoluminescence efficiency (1.7–2.1 times increase in integrated PL intensity as compared to the as-grown sample). Reciprocal space mapping of the as-grown GaNAs samples obtained by using triple-crystal HRXRD shows the presence of interstitially incorporated of N atoms with no lattice relaxation in the direction parallel to the growth surface. These results have significant implication on the growth and post-growth treatment of nitride compound semiconductor materials for high performance optoelectronics devices.

Performance Enhancement of Channel-Engineered Al–Zn–Sn–O Thin-Film Transistors with Highly Conductive In–Ga–Zn–O Buried Layer via Vacuum Rapid Thermal Annealing

2020 ◽  
Vol 20 (8) ◽  
pp. 4671-4677
Author(s):  
Sung-Hun Kim ◽  
Won-Ju Cho
Keyword(s):  
Thin Film ◽  
Thermal Annealing ◽  
Temperature Stress ◽  
Rapid Thermal Annealing ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
High Performance ◽  
Gate Bias ◽  
Buried Layer ◽  
Bias Temperature Stress

In this study, we propose, fabricate, and examine the electrical characteristics of high-performance channel-engineered amorphous aluminum-doped zinc tin oxide (a-AZTO) thin-film transistors (TFTs). Amorphous indium gallium zinc oxide (a-IGZO) film with improved conductivity (obtained via rapid thermal annealing in vacuum) is applied as the local conductive buried layer (LCBL) of the channel-engineered a-AZTO TFTs. The optical transmittance of the a-IGZO and a-AZTO films in the visible region is >85%. The a-IGZO LCBL reduces the resistance of the a-AZTO channel, thereby resulting in increased drain current and improved device performance. We find that our fabricated channel-engineered a-AZTO TFTs with LCBLs are superior to non-channel-engineered a-AZTO TFTs without LCBLs in terms of electrical properties such as the threshold voltage, mobility, subthreshold swing, and on–off current ratios. In particular, as the a-IGZO LCBL length at the bottom of the channel increases, the channel resistance gradually decreases, eventually resulting in a mobility of 22.8 cm2/V · s, subthreshold swing of 470 mV/dec, and on–off current ratio of 3.98×107. We also investigate the effect of the a-IGZO LCBL on the operational reliability of a-AZTO TFTs by measuring the variation in the threshold voltage for positive gate bias temperature stress (PBTS), negative gate bias temperature stress (NBTS), and negative gate bias temperature illumination stress (NBTIS). The results indicate that the TFT instability for temperature and light is not affected by the LCBL. Therefore, our proposed channel-engineered a-AZTO TFT can form a promising high-performance high-reliability switching device for next-generation displays.

Advanced Annealing Schemes for High-Performance SOI Logic Technologies

2008 ◽  
Vol 573-574 ◽  
pp. 387-400 ◽  
Author(s):  
Thomas Feudel
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
High Performance ◽  
Laser Annealing ◽  
Process Parameter ◽  
New Materials ◽  
Short Channel ◽  
Technology Node ◽  
The Impact ◽  
Continuous Temperature

We have extensively studied the impact of advanced annealing schemes for highperformance SOI logic technologies. Starting with the 130 nm technology node, we introduced spike rapid thermal annealing (sRTA). Continuous temperature reduction combined with implant scaling helped to improve transistor performance and short channel behavior. During the development of the 90 nm technology we evaluated flash lamp and laser annealing (FLA). These techniques became an essential part of the 65 nm node. At this node we also faced major challenges in terms of compatibility with new materials like SiGe as well as the need for reduction of process parameter fluctuations. Scaling will be continued with the 45 nm technology node towards a truly diffusionless process.

High Quality Poly-Si Film and Transistor Formed by Nickel-Induced- Lateral-Crystallization and Pulsed-Rapid-Thermal-Annealing

2001 ◽  
Vol 685 ◽  
Author(s):  
T.C. Leung ◽  
C.F. Cheng ◽  
M.C. Poon
Keyword(s):  
Low Temperature ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
High Performance ◽  
Low Cost ◽  
Drain Current ◽  
Large Area ◽  
High Quality ◽  
Lateral Crystallization ◽  
Si Films

AbstractNickel Induced Lateral Crystallization (NILC) and Pulsed Rapid Thermal Annealing (PRTA) have been used to study new low temperature and high quality poly-silicon (poly-Si) films and thin film transistors (TFTs). The growth rate of poly-Si films has been found to greatly increase from 0.025μm/minute to 1.07μm/minute, and the drain current and performance of TFTs have increased by around 75%. The new poly-Si technology has good potential to apply in high performance, large area, fast throughput, low cost and even low temperature device applications.

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