Energy and performance-aware application mapping for inhomogeneous 3D networks-on-chip

Journal of Systems Architecture ◽

10.1016/j.sysarc.2018.08.002 ◽

2018 ◽

Vol 89 ◽

pp. 103-117 ◽

Cited By ~ 14

Author(s):

Michael Opoku Agyeman ◽

Ali Ahmadinia ◽

Nader Bagherzadeh

Keyword(s):

Networks On Chip ◽

Application Mapping ◽

And Performance ◽

On Chip ◽

3D Networks

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PhoNoCMap: an Application Mapping Tool for Photonic Networks-on-Chip

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) ◽

10.3850/9783981537079_0283 ◽

2016 ◽

Cited By ~ 4

Author(s):

Edoardo Fusella ◽

Alessandro Cilardo

Keyword(s):

Photonic Networks ◽

Networks On Chip ◽

Application Mapping ◽

Mapping Tool ◽

On Chip

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Hybrid Partially Adaptive Fault-Tolerant Routing for 3D Networks-on-Chip

Embedded Systems ◽

10.1002/9781118468654.ch10 ◽

2012 ◽

pp. 239-258

Author(s):

Sudeep Pasricha ◽

Yong Zou

Keyword(s):

Fault Tolerant ◽

Networks On Chip ◽

On Chip ◽

3D Networks

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Exploring a low-cost inter-layer communication scheme for 3D networks-on-chip

2010 15th CSI International Symposium on Computer Architecture and Digital Systems ◽

10.1109/cads.2010.5623588 ◽

2010 ◽

Cited By ~ 3

Author(s):

Amir-Mohammad Rahmani ◽

Pasi Liljeberg ◽

Juha Plosila ◽

Hannu Tenhunen

Keyword(s):

Low Cost ◽

Networks On Chip ◽

Communication Scheme ◽

On Chip ◽

3D Networks

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G-CARA: A Global Congestion-Aware Routing Algorithm for traffic management in 3D networks-on-chip

2017 Iranian Conference on Electrical Engineering (ICEE) ◽

10.1109/iraniancee.2017.7985425 ◽

2017 ◽

Cited By ~ 5

Author(s):

Nooshin Nosrati ◽

Hadi Shahriar Shahhoseini

Keyword(s):

Traffic Management ◽

Routing Algorithm ◽

Networks On Chip ◽

On Chip ◽

3D Networks ◽

Congestion Aware

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A Reliability-Aware Multi-application Mapping Technique in Networks-on-Chip

2013 21st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing ◽

10.1109/pdp.2013.77 ◽

2013 ◽

Cited By ~ 7

Author(s):

F. Khalili ◽

H. R. Zarandi

Keyword(s):

Mapping Technique ◽

Networks On Chip ◽

Application Mapping ◽

On Chip

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An adaptive router architecture for heterogeneous 3D Networks-on-Chip

2011 NORCHIP ◽

10.1109/norchp.2011.6126725 ◽

2011 ◽

Cited By ~ 3

Author(s):

Michael Opoku Agyeman ◽

Ali Ahmadinia

Keyword(s):

Networks On Chip ◽

Router Architecture ◽

On Chip ◽

3D Networks

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3DBUFFBLESS: A novel buffered-bufferless hybrid router for 3D Networks-on-Chip

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106980 ◽

2017 ◽

Cited By ~ 3

Author(s):

K. Tatas ◽

S. Savva ◽

C. Kyriacou

Keyword(s):

Networks On Chip ◽

On Chip ◽

3D Networks

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Energy and buffer aware application mapping for networks-on-chip with self similar traffic

Journal of Systems Architecture ◽

10.1016/j.sysarc.2013.08.012 ◽

2013 ◽

Vol 59 (10) ◽

pp. 1364-1374 ◽

Cited By ~ 6

Author(s):

Coşkun Çelik ◽

Cüneyt F. Bazlamaçcı

Keyword(s):

Networks On Chip ◽

Application Mapping ◽

Self Similar ◽

On Chip

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Application mapping for express channel-based networks-on-chip

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 ◽

10.7873/date.2014.251 ◽

2014 ◽

Cited By ~ 2

Author(s):

Di Zhu ◽

Lizhong Chen ◽

Siyu Yue ◽

Massoud Pedram

Keyword(s):

Networks On Chip ◽

Application Mapping ◽

On Chip

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Optimising Heterogeneous 3D Networks-on-Chip

2011 Sixth International Symposium on Parallel Computing in Electrical Engineering ◽

10.1109/parelec.2011.40 ◽

2011 ◽

Cited By ~ 4

Author(s):

Michael Opoku Agyeman ◽

Ali Ahmadinia

Keyword(s):

Networks On Chip ◽

On Chip ◽

3D Networks

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