Total ionizing dose response of fluorine implanted Silicon-On-Insulator buried oxide

2014 ◽  
Vol 54 (9-10) ◽  
pp. 2339-2343 ◽  
Author(s):  
Kenneth Potter ◽  
Katrina Morgan ◽  
Chris Shaw ◽  
Peter Ashburn ◽  
William Redman-White ◽  
...  
Keyword(s):  
Dose Response ◽  
Silicon On Insulator ◽  
Total Ionizing Dose ◽  
Buried Oxide

Total Ionizing Dose Response of Different Length Devices in 0.13 μm Partially Depleted Silicon-on-Insulator Technology

2017 ◽  
Vol 34 (8) ◽  
pp. 088501 ◽  
Author(s):  
Meng-Ying Zhang ◽  
Zhi-Yuan Hu ◽  
Zheng-Xuan Zhang ◽  
Shuang Fan ◽  
Li-Hua Dai ◽  
...  
Keyword(s):  
Dose Response ◽  
Silicon On Insulator ◽  
Total Ionizing Dose ◽  
Silicon On Insulator Technology

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

STUDY OF ELECTRICAL CHARACTERISTIC FOR 50NM AND 10NM SOI BODY THICKNESS IN MOSFET DEVICE

2015 ◽  
Vol 77 (21) ◽  
Author(s):  
M.N.I.A Aziz ◽  
F. Salehuddin ◽  
A.S.M. Zain ◽  
K.E. Kaharudin
Keyword(s):  
Thin Film ◽  
Electrical Characteristic ◽  
Silicon On Insulator ◽  
Electrical Characteristics ◽  
Short Channel ◽  
Doping Density ◽  
Soi Mosfet ◽  
Buried Oxide ◽  
Soi Technology ◽  
Better Than

Silicon-on-insulator (SOI) technology is an effective approach of mitigating the short channel effect (SCE) problems. The SOI is believed to be capable of suppressing the SCE, thereby improving the overall electrical characteristics of MOSFET device. SCE in SOI MOSFET is heavily influenced by thin film thickness, thin-film doping density and buried oxide (BOX) thickness. This paper will analyze the effect of BOX towards SOI MOSFET device. The 50nm and 10nm thickness of buried oxide in SOI MOSFET was developed by using SILVACO TCAD tools, specifically known as Athena and Atlas modules. From the observation, the electrical characteristic of 100nm thickness is slightly better than 50nm and 10nm. It is observed that the value drive current of 10nm and 100nm thickness SOI MOSFET was 6.9% and 11% lower than 50nm respectively, but the overall 50nm is superior. However, the electrical characteristics of 10nm SOI MOSFET are still closer and within the range of ITRS 2013 prediction.

Total Ionizing Dose Response of Multiple-Gate Nanowire Field Effect Transistors

2017 ◽  
pp. 1-1 ◽  
Author(s):  
M. Gaillardin ◽  
C. Marcandella ◽  
M. Martinez ◽  
O. Duhamel ◽  
T. Lagutere ◽  
...  
Keyword(s):  
Dose Response ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Total Ionizing Dose

Effect of Annealing on the Structure of Buried SiO2 Layers Formed By Elevated Temperature High Dose Oxygen Implantation

1985 ◽  
Vol 53 ◽  
Author(s):  
S.J. Krause ◽  
C.O. Jung ◽  
S.R. Wilson ◽  
R.P. Lorigan ◽  
M.E. Burnham
Keyword(s):  
Single Crystal ◽  
Oxide Layer ◽  
Elevated Temperatures ◽  
Superficial Layer ◽  
Silicon On Insulator ◽  
High Dose ◽  
Threading Dislocations ◽  
Heater Temperature ◽  
Buried Oxide ◽  
Structural Differences

ABSTRACTOxygen has been implanted into Si wafers at high doses and elevated temperatures to form a buried SiO2 layer for use in silicon-on-insulator (SOI) structures. Substrate heater temperatures have been varied (300, 400, 450 and 500°C) to determine the effect on the structure of the superficial Si layer through a processing cycle of implantation, annealing, and epitaxial growth. Transmission electron microscopy was used to characterize the structure of the superficial layer. The structure of the samples was examined after implantation, after annealing at 1150°C for 3 hours, and after growth of the epitaxial Si layer. There was a marked effect on the structure of the superficial Si layer due to varying substrate heater temperature during implantation. The single crystal structure of the superficial Si layer was preserved at all implantation temperatures from 300 to 500°C. At the highest heater temperature the superficial Si layer contained larger precipitates and fewer defects than did wafers implanted at lower temperatures. Annealing of the as-implanted wafers significantly reduced structural differences. All wafers had a region of large, amorphous 10 to 50 nm precipitates in the lower two-thirds of the superficial Si layer while in the upper third of the layer there were a few threading dislocations. In wafers implanted at lower temperatures the buried oxide grew at the top surface only. During epitaxial Si growth the buried oxide layer thinned and the precipitate region above and below the oxide layer thickened for all wafers. There were no significant structural differences of the epitaxial Si layer for wafers with different implantation temperatures. The epitaxial layer was high quality single crystal Si and contained a few threading dislocations. Overall, structural differences in the epitaxial Si layer due to differences in implantation temperature were minimal.

A review of the mechanical stressors efficiency applied to the ultra-thin body & buried oxide fully depleted silicon on insulator technology

2016 ◽  
Vol 117 ◽  
pp. 100-116 ◽  
Author(s):  
Pierre Morin ◽  
Sylvain Maitrejean ◽  
Frederic Allibert ◽  
Emmanuel Augendre ◽  
Qing Liu ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Thin Body ◽  
Fully Depleted ◽  
Buried Oxide ◽  
Silicon On Insulator Technology

ChemInform Abstract: Growth of Buried Oxide Layers of Silicon-on-Insulator (SOI) Structures by Thermal Oxidation of the Top Silicon Layer.

ChemInform ◽  
2010 ◽  
Vol 28 (43) ◽  
pp. no-no
Author(s):  
E. SCHROER ◽  
S. HOPFE ◽  
Q. Y. TONG ◽  
U. GOESELE ◽  
W. SKORUPA
Keyword(s):  
Thermal Oxidation ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Oxide Layers ◽  
Buried Oxide
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