The low threshold voltage n-type silicon transistors based on a polymer/silica nanocomposite gate dielectric: The effect of annealing temperatures on their operation

2017 ◽  
Vol 416 ◽  
pp. 234-240 ◽  
Author(s):  
Adeleh Hashemi ◽  
Ali Bahari ◽  
Shahram Ghasemi
Keyword(s):  
Threshold Voltage ◽  
Gate Dielectric ◽  
Annealing Temperatures ◽  
Type Silicon ◽  
Silicon Transistors ◽  
Low Threshold ◽  
Silica Nanocomposite

Threshold Voltage Adjustment for 28nm HfOx/ZrOx/HfOx Gate Dielectric of nMOSFETs Using DPN Process with Annealing Temperatures

2014 ◽  
Vol 910 ◽  
pp. 44-47
Author(s):  
Win Der Lee ◽  
Mu Chun Wang
Keyword(s):  
Threshold Voltage ◽  
Gate Dielectric ◽  
Interface State ◽  
State Density ◽  
Strain Effect ◽  
Annealing Temperatures ◽  
High K ◽  
Lower Annealing Temperature ◽  
Channel Lengths ◽  
The Relationship

Following the investigation of the relationship among the annealing temperatures for decoupled plasma nitridation (DPN) process to indirectly manipulate the amount of oxygen vacancy in high-k (HK) gate dielectric, the expected threshold voltage (Vt) of n-channel MOSFET (nMOSFET) device is able to be approached. The uniformity of Vt values related to the channel lengths was fine due to 10% deviation specification, but the roll-up phenomenon coming from the strain effect was observed. The lower annealing temperature shows the higher Vt value due to the higher interface state density, reflecting at the subthreshold swing (S.S.) characteristics.

scholarly journals Extremely-Low Threshold Voltage FinFET for 5G mmWave Applications

2020 ◽  
pp. 1-1
Author(s):  
A. Razavieh ◽  
Y. Chen ◽  
T. Ethirajan ◽  
M. Gu ◽  
S. Cimino ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Low Threshold

Cyanophenoxy-Substituted Silicon Phthalocyanines for Low Threshold Voltage n-Type Organic Thin-Film Transistors

2021 ◽  
Author(s):  
Benjamin King ◽  
Andrew J. Daszczynski ◽  
Nicole A. Rice ◽  
Alexander J. Peltekoff ◽  
Nathan J. Yutronkie ◽  
...  
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Organic Thin Film Transistors ◽  
Organic Thin Film ◽  
Silicon Phthalocyanines ◽  
Low Threshold

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO2 Gate Dielectric

2018 ◽  
Vol 924 ◽  
pp. 482-485
Author(s):  
Min Seok Kang ◽  
Kevin Lawless ◽  
Bong Mook Lee ◽  
Veena Misra
Keyword(s):  
Threshold Voltage ◽  
Interfacial Layer ◽  
Field Effect ◽  
Lanthanum Oxide ◽  
Gate Dielectric ◽  
High Mobility ◽  
High Threshold ◽  
Field Effect Mobility ◽  
The Impact ◽  
Lanthanum Silicate

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VTshift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VTshift are realized.

Efficient preparation of polymer nanofibers by needle roller electrospinning with low threshold voltage

2018 ◽  
Vol 59 (4) ◽  
pp. 745-751 ◽  
Author(s):  
Yanping Zhang ◽  
Liyan Zhang ◽  
Lisheng Cheng ◽  
Yongxin Qin ◽  
Yi Li ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Polymer Nanofibers ◽  
Low Threshold

Dual Work Function CMOS Gate Technology Based on Metal Interdiffusion

2001 ◽  
Vol 670 ◽  
Author(s):  
Igor Polishchuk ◽  
Pushkar Ranade ◽  
Tsu-Jae King ◽  
Chenming Hu
Keyword(s):  
Gate Dielectric ◽  
New Technology ◽  
Cmos Technology ◽  
Dielectric Surface ◽  
Metal Gate ◽  
Gate Electrodes ◽  
Mos Devices ◽  
Low Threshold ◽  
Work Functions ◽  
Electrical Reliability

ABSTRACTIn this paper we propose a new metal-gate CMOS technology that uses a combination of two metals to achieve a low threshold voltage for both n- and p-MOSFET's. One of the gate electrodes is formed by metal interdiffusion so that no metal has to be etched away from the gate dielectric surface. Consequently, this process does not compromise the integrity and electrical reliability of the gate dielectric. This new technology is demonstrated for the Ti-Ni metal combination that produces gate electrodes with 3.9 eV and 5.3 eV work functions for n-MOS and p-MOS devices respectively.

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