P‐67: Foldable Ultra‐High‐Resolution AMOLED Panel with Cascade Display‐Driver Integrated Circuit

2021 ◽  
Vol 52 (1) ◽  
pp. 1329-1332
Author(s):  
Chen-Hui Lee ◽  
Yan-Zhang Huang ◽  
Chien-Kuo Wang ◽  
Ruo-Lan Chang ◽  
Wen-Yu Kuo ◽  
...  
Keyword(s):  
High Resolution ◽  
Integrated Circuit ◽  
Display Driver

High-resolution picosecond acoustic microscopy for non-invasive characterization of buried interfaces

2006 ◽  
Vol 21 (5) ◽  
pp. 1204-1208 ◽  
Author(s):  
Shriram Ramanathan ◽  
David G. Cahill
Keyword(s):  
High Resolution ◽  
Spatial Resolution ◽  
Integrated Circuit ◽  
Acoustic Waves ◽  
Spot Size ◽  
Acoustic Microscopy ◽  
Microscopy Technique ◽  
Fundamental Limitations ◽  
Buried Interfaces ◽  
Advanced Packaging

Non-destructive investigation of buried interfaces at high-resolution is critical for integrated circuit and advanced packaging research and development. In this letter, we present a novel non-contact microscopy technique using ultrahigh frequency (GHz range) longitudinal acoustic pulses to form images of interfaces and layers buried deep inside a silicon device. This method overcomes fundamental limitations of conventional scanning acoustic microscopy by directly generating and detecting the acoustic waves on the surface of the sample using an ultrafast pump-probe optical technique. We demonstrate our method by imaging copper lines buried beneath a 6-μm silicon wafer; the lateral spatial resolution of 3 μm is limited by the laser spot size. In addition to the high lateral spatial resolution, the technique has picosecond (ps) time resolution and therefore will enable imaging individual interconnect layers in multi-layer stacked devices.

Evaluation of a Programmable, Hardware-Driven, Isolated-Droplet Generator

1988 ◽  
Vol 42 (4) ◽  
pp. 567-571 ◽  
Author(s):  
P. M. Wiegand ◽  
S. R. Crouch
Keyword(s):  
High Resolution ◽  
Integrated Circuit ◽  
Computer Control ◽  
Gradient Elution ◽  
General Purpose ◽  
Main Stream ◽  
Droplet Generator ◽  
Liquid Handling ◽  
Handling Device ◽  
Droplet Production

A progammable, high-resolution liquid-handling device, suitable for both aqueous and organic solvents, is described. This device, called an isolated-droplet generator (IDG), is based on the vibrating-capillary principle of droplet production. The unit described is capable of converting a liquid stream, such as that produced by an HPLC, to a subnanoliter-sized monodisperse droplet stream generated at rates of up to 50 kHz. Charging and deflection circuitry can be used to select individual droplets or droplet packets from the main stream. The instrument is an improvement over older designs, in that computer control imparts sufficient flexibility to make the device useful as a general-purpose high-resolution liquid-handling system. Droplet production parameters can be automatically altered to compensate for changing liquid streams, such as occur in liquid chromatography with gradient elution. The waveforms for droplet production and charging are produced entirely in hardware by a programmable counter/timer integrated circuit (IC).

A LOW POWER HIGH RESOLUTION ROIC DESIGN WITH 14-BIT COLUMN-LEVEL ADC FOR 384 × 288 IRFPA

2013 ◽  
Vol 22 (09) ◽  
pp. 1340015 ◽  
Author(s):  
YAJING ZHANG ◽  
WENGAO LU ◽  
GUANNAN WANG ◽  
ZHONGJIAN CHEN ◽  
YACONG ZHANG
Keyword(s):  
High Resolution ◽  
Low Power ◽  
Integrated Circuit ◽  
High Speed ◽  
High Performance ◽  
Low Noise ◽  
Cmos Process ◽  
Readout Integrated Circuit ◽  
Analog To Digital Conversion ◽  
Amplifier Design

A readout integrated circuit (ROIC) of infrared focal plane array (IRFPA) with low power and low noise is presented in this paper. It consists of a 384 × 288 pixel array and column-level A/D conversion circuits. The proposed system has high resolution because of the odd–even Analog to Digital Conversion (ADC) structure, containing correlated switches design, multi-Vth amplifier design and high speed high resolution comparator design including latch-stage. Designed and simulated in 0.35-μm CMOS process, this high performance ROIC achieves 81.24 dB SNR at 8.64 KS/s consuming 98 mW under 5 V voltage supply, resulting in an ENOB of 13.2-bit.

High Resolution Die Stress Mapping Using Arrays of CMOS Sensors

2007 ◽  
Author(s):  
Yonggang Chen ◽  
Richard C. Jaeger ◽  
Jeffrey C. Suhling
Keyword(s):  
High Resolution ◽  
Integrated Circuit ◽  
Sensor Arrays ◽  
Cmos Technology ◽  
Shear Stresses ◽  
Cmos Sensor ◽  
Bending Load ◽  
Die Stress ◽  
Stress Mapping ◽  
On Chip

This paper reports high resolution die stress measurements using a multiplexed array of 512 current mirror type CMOS piezoresistive FET stress sensor cells fabricated on an MOSIS tiny chip. Using 1.5 μm CMOS technology, a stress mapping resolution of 256 points/mm2 has been obtained, providing high spatial resolution mapping of the stress on the surface of the integrated circuit die. Driven by an on-chip counter, the sequentially scanned array efficiently maps the two-dimensional stress field. The sensor array is calibrated using a chip-on-beam calibration technique. These CMOS sensor arrays have been used to map stress on the die in the chip-on-beam configuration under four-point-bending load, in encapsulated chip-on-beam samples, and in DIP40 packages with cavities filled with underfill. The measured stress distribution agrees well with finite element simulation results, and permit smooth measurement of stress gradients on the surface of the integrated circuit die. The results give clear verification that the NMOS PiFET sensors are indeed responding to shear stresses.

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