[1992] Proceedings of the Second Great Lakes Symposium on VLSI
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Published By IEEE Comput. Soc. Press

0818626100

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A new conflict resolving switchbox router

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218359 ◽

2003 ◽

Author(s):

Tae Won Cho ◽

S.S. Pyo ◽

J.R. Heath

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Optimum Steiner tree generation

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218343 ◽

2003 ◽

Cited By ~ 1

Author(s):

F.D. Lewis ◽

Wang Chia-Chi Pong ◽

N. Van Cleave

Keyword(s):

Steiner Tree ◽

Tree Generation

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Clock tree regeneration

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218345 ◽

2003 ◽

Author(s):

Jan-ming Ho ◽

Ren-Song Tsay

Keyword(s):

Tree Regeneration ◽

Clock Tree

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Two-layer via-free routing in channels and switchboxes

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218360 ◽

2003 ◽

Author(s):

Kuo-Feng Liao

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A design for concurrent error detections in FPLAs

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218371 ◽

2003 ◽

Author(s):

Tsin-Yuan Chang ◽

Jean-Bean Hsu ◽

Cheng-Chi Wang ◽

Yu-Shen Lin

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Examining routing solutions

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218369 ◽

2003 ◽

Author(s):

S. Bapat ◽

J.P. Cohoon ◽

P.L. Heck ◽

A. Ju ◽

L.J. Randall

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Quadtree interconnection network layout

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218362 ◽

2003 ◽

Author(s):

S. Bhattacharya ◽

S. Kirani ◽

W.-T. Tsai

Keyword(s):

Interconnection Network ◽

Network Layout

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VLSI implementation of controllers for communication protocols from their Petri net models

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218356 ◽

2003 ◽

Cited By ~ 1

Author(s):

A.M.T. Khan ◽

S.M. Sait ◽

G.F. Beckhoff

Keyword(s):

Petri Net ◽

Communication Protocols ◽

Vlsi Implementation

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Models for bit-true simulation and high-level synthesis of DSP applications

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218365 ◽

2003 ◽

Author(s):

M. Pauwels ◽

D. Lanneer ◽

F. Catthoor ◽

G. Goossens ◽

H. De Man

Keyword(s):

High Level Synthesis ◽

High Level ◽

Dsp Applications

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High performance data-path synthesis via communication metrics

[1992] Proceedings of the Second Great Lakes Symposium on VLSI ◽

10.1109/glsv.1992.218364 ◽

2003 ◽

Author(s):

A. Seawright ◽

F. Brewer

Keyword(s):

High Performance ◽

Performance Data ◽

Data Path ◽

Path Synthesis

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[1992] Proceedings of the Second Great Lakes Symposium on VLSILatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc. Press

A new conflict resolving switchbox router

Optimum Steiner tree generation

Clock tree regeneration

Two-layer via-free routing in channels and switchboxes

A design for concurrent error detections in FPLAs

Examining routing solutions

Quadtree interconnection network layout

VLSI implementation of controllers for communication protocols from their Petri net models

Models for bit-true simulation and high-level synthesis of DSP applications

High performance data-path synthesis via communication metrics

[1992] Proceedings of the Second Great Lakes Symposium on VLSI
Latest Publications