2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781424484478

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A Design of Self-Defect-Compensatable Hardware Neuron for Multi-layer Neural Networks

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.17 ◽

2010 ◽

Author(s):

Kunihito Yamamori ◽

Keisuke Tashiro ◽

Masamichi Kusano ◽

Ikuo Yoshihara

Keyword(s):

Neural Networks

Download Full-text

Design and Evaluation of Burst-Mode Asynchronous 8-Bit Microprocessor Using Standard FPGA Development System

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.28 ◽

2010 ◽

Cited By ~ 1

Author(s):

Tatsuya Suto ◽

Kenji Ichijo ◽

Yoshio Yoshioka

Keyword(s):

Development System ◽

Burst Mode

Download Full-text

A Reliable Reconfiguration Controller for Fault-Tolerant Embedded Systems on Multi-FPGA Platforms

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.30 ◽

2010 ◽

Cited By ~ 7

Author(s):

C. Bolchini ◽

L. Fossati ◽

D. Merodio Codinachs ◽

A. Miele ◽

C. Sandionigi

Keyword(s):

Embedded Systems ◽

Fault Tolerant ◽

Reconfiguration Controller

Download Full-text

Soft Error Tolerant BILBO FF

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.16 ◽

2010 ◽

Cited By ~ 3

Author(s):

Kazuteru Namba ◽

Hideo Ito

Keyword(s):

Soft Error

Download Full-text

AF-Test: Adaptive-Frequency Scan Test Methodology for Small-Delay Defects

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.48 ◽

2010 ◽

Cited By ~ 2

Author(s):

Tsung-Yeh Li ◽

Shi-Yu Huang ◽

Hsuan-Jung Hsu ◽

Chao-Wen Tzeng ◽

Chih-Tsun Huang ◽

...

Keyword(s):

Test Methodology ◽

Small Delay Defects ◽

Scan Test ◽

Small Delay ◽

Frequency Scan ◽

Delay Defects

Download Full-text

Recovery Method for a Laser Array Failure on Dynamic Optically Reconfigurable Gate Arrays

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.55 ◽

2010 ◽

Author(s):

Daisaku Seto ◽

Minoru Watanabe

Keyword(s):

Laser Array ◽

Recovery Method ◽

Gate Arrays

Download Full-text

A Strategy for Interconnect Testing in Stacked Mesh Network-on-Chip

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.21 ◽

2010 ◽

Cited By ~ 2

Author(s):

Min-Ju Chan ◽

Chun-Lung Hsu

Keyword(s):

Network On Chip ◽

Mesh Network ◽

Interconnect Testing ◽

On Chip

Download Full-text

Logic Gate Failure Characterization for Nanoelectronic EDA Tools

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.9 ◽

2010 ◽

Cited By ~ 2

Author(s):

Payman Zarkesh-Ha ◽

Ali Arabi M. Shahi

Keyword(s):

Logic Gate ◽

Eda Tools

Download Full-text

Reviewers

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.7 ◽

2010 ◽

Download Full-text

Adaptive De-noising Filter Algorithm for CMOS Image Sensor Testing Applications

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems ◽

10.1109/dft.2010.23 ◽

2010 ◽

Cited By ~ 2

Author(s):

Chun-Lung Hsu ◽

Chen-Wei Lan ◽

Yu-Chih Lo ◽

Yu-Sheng Huang

Keyword(s):

Cmos Image Sensor ◽

Image Sensor

Download Full-text

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI SystemsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A Design of Self-Defect-Compensatable Hardware Neuron for Multi-layer Neural Networks

Design and Evaluation of Burst-Mode Asynchronous 8-Bit Microprocessor Using Standard FPGA Development System

A Reliable Reconfiguration Controller for Fault-Tolerant Embedded Systems on Multi-FPGA Platforms

Soft Error Tolerant BILBO FF

AF-Test: Adaptive-Frequency Scan Test Methodology for Small-Delay Defects

Recovery Method for a Laser Array Failure on Dynamic Optically Reconfigurable Gate Arrays

A Strategy for Interconnect Testing in Stacked Mesh Network-on-Chip

Logic Gate Failure Characterization for Nanoelectronic EDA Tools

Reviewers

Adaptive De-noising Filter Algorithm for CMOS Image Sensor Testing Applications

2010 IEEE 25th International Symposium on Defect and Fault Tolerance in VLSI Systems
Latest Publications