2019 IEEE International Solid- State Circuits Conference - (ISSCC)
Latest Publications

TOTAL DOCUMENTS

260

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781538685310

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

11.4 A Fast-Readout Mismatch-Insensitive Magnetoresistive Biosensor Front-End Achieving Sub-ppm Sensitivity

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662440 ◽

2019 ◽

Cited By ~ 3

Author(s):

Xiahan Zhou ◽

Michael Sveiven ◽

Drew A. Hall

Keyword(s):

Front End

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26.5 A 0.1-to-0.2V Transformer-Based Switched-Mode Folded DCO in 22nm FDSOI With Active Step-Down Impedance Achieving 197dBc/Hz Peak FoM and 40MHz/V Frequency Pushing

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662516 ◽

2019 ◽

Cited By ~ 1

Author(s):

Omar El-Aassar ◽

Gabriel M. Rebeiz

Keyword(s):

Step Down

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30.7 An 8b Injection-Locked Phase Rotator with Dynamic Multiphase Injection for 28/56/112Gb/s Serdes Application

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662292 ◽

2019 ◽

Author(s):

Yi-Chieh Huang ◽

Bo-Jiun Chen

Keyword(s):

Phase Rotator

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ISSCC 2019 Session 21 Overview: 4G/5G Transceivers

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662289 ◽

2019 ◽

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6.7 A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662361 ◽

2019 ◽

Cited By ~ 4

Author(s):

Pen-Jui Peng ◽

Yan-Ting Chen ◽

Sheng-Tsung Lai ◽

Chao-Hsuan Chen ◽

Hsiang-En Huang ◽

...

Keyword(s):

Voltage Mode ◽

Automatic Phase ◽

Phase Alignment

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ISSCC 2019 Session 6 Overview: Ultra-High-Speed Wireline

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662376 ◽

2019 ◽

Keyword(s):

High Speed ◽

Ultra High Speed

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16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fsrms Jitter in 65nm LP CMOS

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662411 ◽

2019 ◽

Cited By ~ 2

Author(s):

Luigi Grimaldi ◽

Luca Bertulessi ◽

Saleh Karman ◽

Dmytro Cherniak ◽

Alessandro Garghetti ◽

...

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ISSCC 2019 Session 27 Overview: Energy Harvesting & DC/DC Control Techniques

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662354 ◽

2019 ◽

Keyword(s):

Energy Harvesting ◽

Control Techniques

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30.3 A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662429 ◽

2019 ◽

Cited By ~ 2

Author(s):

Takashi Toi ◽

Junji Wadatsumi ◽

Hiroyuki Kobayashi ◽

Yutaka Shimizu ◽

Yuji Satoh ◽

...

Keyword(s):

Storage Systems ◽

Ring Topology ◽

Large Capacity ◽

High Bandwidth

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1.1 Deep Learning Hardware: Past, Present, and Future

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662396 ◽

2019 ◽

Cited By ~ 18

Author(s):

Yann LeCun

Keyword(s):

Deep Learning

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2019 IEEE International Solid- State Circuits Conference - (ISSCC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

11.4 A Fast-Readout Mismatch-Insensitive Magnetoresistive Biosensor Front-End Achieving Sub-ppm Sensitivity

26.5 A 0.1-to-0.2V Transformer-Based Switched-Mode Folded DCO in 22nm FDSOI With Active Step-Down Impedance Achieving 197dBc/Hz Peak FoM and 40MHz/V Frequency Pushing

30.7 An 8b Injection-Locked Phase Rotator with Dynamic Multiphase Injection for 28/56/112Gb/s Serdes Application

ISSCC 2019 Session 21 Overview: 4G/5G Transceivers

6.7 A 112Gb/s PAM-4 Voltage-Mode Transmitter with 4-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40nm CMOS

ISSCC 2019 Session 6 Overview: Ultra-High-Speed Wireline

16.7 A 30GHz Digital Sub-Sampling Fractional-N PLL with 198fsrms Jitter in 65nm LP CMOS

ISSCC 2019 Session 27 Overview: Energy Harvesting & DC/DC Control Techniques

30.3 A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems

1.1 Deep Learning Hardware: Past, Present, and Future

2019 IEEE International Solid- State Circuits Conference - (ISSCC)
Latest Publications