2008 IEEE 14th International Symposium on High Performance Computer Architecture
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Published By IEEE

9781424420704

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PEEP: Exploiting predictability of memory dependences in SMT processors

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658634 ◽

2008 ◽

Cited By ~ 5

Author(s):

Samantika Subramaniam ◽

Milos Prvulovic ◽

Gabriel H. Loh

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Runtime validation of memory ordering using constraint graph checking

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658657 ◽

2008 ◽

Cited By ~ 23

Author(s):

Kaiyu Chen ◽

Sharad Malik ◽

Priyadarsan Patra

Keyword(s):

Constraint Graph ◽

Runtime Validation

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Fabric convergence implications on systems architecture

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658624 ◽

2008 ◽

Cited By ~ 2

Author(s):

Kevin Leigh ◽

Parthasarathy Ranganathan ◽

Jaspal Subhlok

Keyword(s):

Systems Architecture

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Amdahl’s Law in the multicore era

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658638 ◽

2008 ◽

Cited By ~ 21

Author(s):

Mark D. Hill

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Incorporating flexibility in Anton, a specialized machine for molecular dynamics simulation

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658651 ◽

2008 ◽

Cited By ~ 14

Author(s):

Jeffrey S. Kuskin ◽

Cliff Young ◽

J.P. Grossman ◽

Brannon Batson ◽

Martin M. Deneroff ◽

...

Keyword(s):

Molecular Dynamics ◽

Molecular Dynamics Simulation ◽

Dynamics Simulation

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Fundamental performance constraints in horizontal fusion of in-order cores

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658644 ◽

2008 ◽

Cited By ~ 18

Author(s):

Pierre Salverda ◽

Craig Zilles

Keyword(s):

Performance Constraints

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Prediction of CPU idle-busy activity pattern

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658625 ◽

2008 ◽

Cited By ~ 4

Author(s):

Qian Diao ◽

Justin Song

Keyword(s):

Activity Pattern

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A comprehensive approach to DRAM power management

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658648 ◽

2008 ◽

Cited By ~ 50

Author(s):

Ibrahim Hur ◽

Calvin Lin

Keyword(s):

Power Management ◽

Comprehensive Approach

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CMP network-on-chip overlaid with multi-band RF-interconnect

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658639 ◽

2008 ◽

Cited By ~ 127

Author(s):

M. Frank Chang ◽

Jason Cong ◽

Adam Kaplan ◽

Mishali Naik ◽

Glenn Reinman ◽

...

Keyword(s):

Network On Chip ◽

On Chip ◽

Multi Band

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Branch-mispredict level parallelism (BLP) for control independence

2008 IEEE 14th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2008.4658628 ◽

2008 ◽

Cited By ~ 4

Author(s):

Kshitiz Malik ◽

Mayank Agarwal ◽

Sam S. Stone ◽

Kevin M. Woley ◽

Matthew I. Frank

Keyword(s):

Level Parallelism

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2008 IEEE 14th International Symposium on High Performance Computer ArchitectureLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

PEEP: Exploiting predictability of memory dependences in SMT processors

Runtime validation of memory ordering using constraint graph checking

Fabric convergence implications on systems architecture

Amdahl’s Law in the multicore era

Incorporating flexibility in Anton, a specialized machine for molecular dynamics simulation

Fundamental performance constraints in horizontal fusion of in-order cores

Prediction of CPU idle-busy activity pattern

A comprehensive approach to DRAM power management

CMP network-on-chip overlaid with multi-band RF-interconnect

Branch-mispredict level parallelism (BLP) for control independence

2008 IEEE 14th International Symposium on High Performance Computer Architecture
Latest Publications