Proceedings 13th International Symposium on System Synthesis
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Artificial neural network implementation on a single FPGA of a pipelined on-line backpropagation

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874054 ◽

2005 ◽

Cited By ~ 51

Author(s):

R. Gadea ◽

J. Cerda ◽

F. Ballester ◽

A. Macholi

Keyword(s):

Neural Network ◽

Artificial Neural Network ◽

On Line ◽

Artificial Neural

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Mapping array communication onto FIFO communication - towards an implementation

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874051 ◽

2002 ◽

Cited By ~ 2

Author(s):

J. Kang ◽

A. van der Werf ◽

P. Lippens

Keyword(s):

Mapping Array

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Embedded systems verification with FGPA-enhanced in-circuit emulator

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874041 ◽

2002 ◽

Cited By ~ 5

Author(s):

M. Meerwein ◽

C. Baumgartner ◽

T. Wieja ◽

W. Glauert

Keyword(s):

Embedded Systems

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Instruction-based system-level power evaluation of system-on-a-chip peripheral cores

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874044 ◽

2002 ◽

Cited By ~ 14

Author(s):

T.D. Givargis ◽

F. Vahid ◽

J. Henkel

Keyword(s):

System Level ◽

System On A Chip ◽

Power Evaluation

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Execution condition analysis in high level synthesis: a unified approach

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874031 ◽

2002 ◽

Cited By ~ 3

Author(s):

O. Penalba ◽

J.M. Mendias ◽

M.C. Molina

Keyword(s):

High Level Synthesis ◽

Unified Approach ◽

Execution Condition ◽

High Level

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Source code optimization and profiling of energy consumption in embedded systems

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874049 ◽

2002 ◽

Cited By ~ 31

Author(s):

T. Simunic ◽

L. Benini ◽

G. De Micheli ◽

M. Hans

Keyword(s):

Energy Consumption ◽

Embedded Systems ◽

Source Code ◽

Code Optimization

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A transformational approach to constraint relaxation of a time-driven simulation model

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874040 ◽

2002 ◽

Cited By ~ 6

Author(s):

M. Jersak ◽

Ying Cai ◽

D. Ziegenbein ◽

R. Ernst

Keyword(s):

Simulation Model ◽

Constraint Relaxation

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Instruction scheduling for clustered VLIW architectures

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874027 ◽

2002 ◽

Cited By ~ 15

Author(s):

J. Sanchez ◽

A. Gonzalez

Keyword(s):

Instruction Scheduling ◽

Vliw Architectures

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Low power storage cycle budget distribution tool support for hierarchical graphs

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874050 ◽

2002 ◽

Cited By ~ 3

Author(s):

E. Brockmeyer ◽

A. Vandecappelle ◽

S. Wuytack ◽

F. Catthoor

Keyword(s):

Low Power ◽

Tool Support ◽

Power Storage

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Compiler optimization on instruction scheduling for low power

Proceedings 13th International Symposium on System Synthesis ◽

10.1109/isss.2000.874029 ◽

2002 ◽

Cited By ~ 19

Author(s):

Chingren Lee ◽

Jenq Kuen Lee ◽

TingTing Hwang

Keyword(s):

Low Power ◽

Compiler Optimization ◽

Instruction Scheduling

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Proceedings 13th International Symposium on System SynthesisLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Artificial neural network implementation on a single FPGA of a pipelined on-line backpropagation

Mapping array communication onto FIFO communication - towards an implementation

Embedded systems verification with FGPA-enhanced in-circuit emulator

Instruction-based system-level power evaluation of system-on-a-chip peripheral cores

Execution condition analysis in high level synthesis: a unified approach

Source code optimization and profiling of energy consumption in embedded systems

A transformational approach to constraint relaxation of a time-driven simulation model

Instruction scheduling for clustered VLIW architectures

Low power storage cycle budget distribution tool support for hierarchical graphs

Compiler optimization on instruction scheduling for low power

Proceedings 13th International Symposium on System Synthesis
Latest Publications