Proceedings of IEEE Workshop on VLSI Signal Processing
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

0780309960

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Practical algorithm-based fault tolerant DFT system implementation on a hypercube multiprocessor

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404466 ◽

2002 ◽

Author(s):

San-Lung Sung ◽

G.R. Redinbo

Keyword(s):

Fault Tolerant ◽

System Implementation ◽

Practical Algorithm

Download Full-text

Image processing board for real-time extraction of line symbols from video sequences for AGV

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404505 ◽

2002 ◽

Cited By ~ 6

Author(s):

J. Schonfeld ◽

P. Pirsch

Keyword(s):

Image Processing ◽

Real Time ◽

Video Sequences

Download Full-text

Exploring the algorithmic design space using high level synthesis

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404495 ◽

2002 ◽

Cited By ~ 5

Author(s):

M. Potkonjak ◽

J. Rabaey

Keyword(s):

Design Space ◽

High Level Synthesis ◽

Algorithmic Design ◽

High Level

Download Full-text

A VLSI architecture for rate-distortion optimized motion compensation using variable size blocks

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404504 ◽

2002 ◽

Cited By ~ 1

Author(s):

P. Srinivas ◽

S. Varadarajan ◽

V. Kalapatapu ◽

M. Bayoumi

Keyword(s):

Motion Compensation ◽

Vlsi Architecture ◽

Rate Distortion ◽

Variable Size

Download Full-text

Specification, partitioning and design of a DAB channel decoder

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404506 ◽

2002 ◽

Cited By ~ 10

Author(s):

J.A. Huisken ◽

F. van den laar ◽

A. Delaruelle ◽

N.J.L. Philips

Download Full-text

VLSI architectures for accurate motion and disparity estimation using full-search block-matching and edge preserving non-linear smoothing

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404500 ◽

2002 ◽

Author(s):

H.C. Karathanasis ◽

J.A. Vlontzos

Keyword(s):

Block Matching ◽

Disparity Estimation ◽

Edge Preserving ◽

Vlsi Architectures ◽

Non Linear ◽

Linear Smoothing ◽

Full Search

Download Full-text

An asynchronous communication protocol for internode connections in a scalable processor array

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404456 ◽

2002 ◽

Author(s):

J. Levison ◽

I. Kuroda

Keyword(s):

Communication Protocol ◽

Asynchronous Communication ◽

Processor Array

Download Full-text

A new generation 16-bit general purpose programmable DSP and its video rate application

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404498 ◽

2002 ◽

Cited By ~ 13

Author(s):

M. Yoshida ◽

H. Ohtomo ◽

I. Kuroda

Keyword(s):

General Purpose ◽

New Generation ◽

Programmable Dsp

Download Full-text

Symbolic macro test for DSP systems applied to a voice coder application

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404485 ◽

2002 ◽

Author(s):

J. Steensma ◽

B. Vanhoof ◽

F. Cathoor ◽

H. de Man

Keyword(s):

Dsp Systems

Download Full-text

Hardware-software trade-offs for emulation

Proceedings of IEEE Workshop on VLSI Signal Processing ◽

10.1109/vlsisp.1993.404484 ◽

2002 ◽

Cited By ~ 1

Author(s):

M. Ade ◽

P. Wauters ◽

R. Lauwereins ◽

M. Engels ◽

J.A. Peperstraete

Keyword(s):

Trade Offs

Download Full-text

Proceedings of IEEE Workshop on VLSI Signal ProcessingLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Practical algorithm-based fault tolerant DFT system implementation on a hypercube multiprocessor

Image processing board for real-time extraction of line symbols from video sequences for AGV

Exploring the algorithmic design space using high level synthesis

A VLSI architecture for rate-distortion optimized motion compensation using variable size blocks

Specification, partitioning and design of a DAB channel decoder

VLSI architectures for accurate motion and disparity estimation using full-search block-matching and edge preserving non-linear smoothing

An asynchronous communication protocol for internode connections in a scalable processor array

A new generation 16-bit general purpose programmable DSP and its video rate application

Symbolic macro test for DSP systems applied to a voice coder application

Hardware-software trade-offs for emulation

Proceedings of IEEE Workshop on VLSI Signal Processing
Latest Publications