Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE Comput. Soc

0818684240

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

High speed serial communication in a future parallel computer architecture

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670418 ◽

2002 ◽

Cited By ~ 1

Author(s):

H. Nakajo ◽

Y. Kaneda

Keyword(s):

Computer Architecture ◽

High Speed ◽

Serial Communication ◽

Parallel Computer

Download Full-text

Future generation processors: using hierarchy and replication

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670409 ◽

2002 ◽

Author(s):

Q. Jacobsen ◽

E. Rotenberg ◽

J.E. Smith

Keyword(s):

Future Generation

Download Full-text

OSCAR multi-grain architecture and its evaluation

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670416 ◽

2002 ◽

Cited By ~ 2

Author(s):

H. Kasahara ◽

W. Ogata ◽

K. Kimura ◽

G. Matsui ◽

H. Matsuzaki ◽

...

Download Full-text

Towards the realistic "virtual hardware"

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670407 ◽

2002 ◽

Author(s):

Y. Shibata ◽

H. Miyazaki ◽

Xiao-Ping Ling ◽

H. Amano

Download Full-text

The A-NET working prototype: a parallel object-oriented multicomputer with reconfigurable network

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670406 ◽

2002 ◽

Cited By ~ 3

Author(s):

T. Baba ◽

T. Yoshinaga ◽

Y. Iwamoto ◽

D. Abe

Keyword(s):

Object Oriented

Download Full-text

Functionally integrated systems on a chip: technologies, architectures, CAD tools, and applications

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670410 ◽

2002 ◽

Author(s):

E.A. McShane ◽

K. Shenai

Keyword(s):

Integrated Systems ◽

Cad Tools

Download Full-text

Memory based light weight communication architecture for local area distributed computing

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670419 ◽

2002 ◽

Cited By ~ 1

Author(s):

T. Kudoh ◽

F. Sudoh ◽

Y. Ishikawa ◽

J. Yamamoto ◽

H. Amano ◽

...

Keyword(s):

Distributed Computing ◽

Local Area ◽

Light Weight ◽

Communication Architecture

Download Full-text

The interactive restructuring of MATLAB programs using the FALCON environment

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670399 ◽

2002 ◽

Author(s):

B. Marsolf ◽

K. Gallivan ◽

E. Gallopoulos

Download Full-text

Effectiveness of register preloading on CP-PACS node processor

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670412 ◽

2002 ◽

Cited By ~ 1

Author(s):

H. Nakamura ◽

K. Itakura ◽

M. Matsubara ◽

T. Boku ◽

K. Nakazawa

Download Full-text

The intelligent cache controller of a massively parallel processor JUMP-I

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems ◽

10.1109/iwia.1997.670417 ◽

2002 ◽

Author(s):

M. Goshima ◽

S. Mori ◽

H. Nakashima ◽

S. Tomita

Keyword(s):

Massively Parallel ◽

Parallel Processor ◽

Massively Parallel Processor ◽

Intelligent Cache

Download Full-text

Proceedings Innovative Architecture for Future Generation High-Performance Processors and SystemsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

High speed serial communication in a future parallel computer architecture

Future generation processors: using hierarchy and replication

OSCAR multi-grain architecture and its evaluation

Towards the realistic "virtual hardware"

The A-NET working prototype: a parallel object-oriented multicomputer with reconfigurable network

Functionally integrated systems on a chip: technologies, architectures, CAD tools, and applications

Memory based light weight communication architecture for local area distributed computing

The interactive restructuring of MATLAB programs using the FALCON environment

Effectiveness of register preloading on CP-PACS node processor

The intelligent cache controller of a massively parallel processor JUMP-I

Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems
Latest Publications