Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017
Latest Publications

TOTAL DOCUMENTS

338

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9783981537086

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

INSPEX: Design and integration of a portable/wearable smart spatial exploration system

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927089 ◽

2017 ◽

Cited By ~ 2

Author(s):

S. Lesecq ◽

Julie Foucault ◽

F. Birot ◽

H. de Chaumont ◽

C. Jackson ◽

...

Keyword(s):

Spatial Exploration

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3DFAR: A three-dimensional fabric for reliable multi-core processors

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927006 ◽

2017 ◽

Cited By ~ 1

Author(s):

Javad Bagherzadeh ◽

Valeria Bertacco

Keyword(s):

Three Dimensional

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Advanced spintronic memory and logic for non-volatile processors

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927132 ◽

2017 ◽

Cited By ~ 9

Author(s):

Robert Perricone ◽

Ibrahim Ahmed ◽

Zhaoxin Liang ◽

Meghna G. Mankalale ◽

X. Sharon Hu ◽

...

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An advanced embedded architecture for connected component analysis in industrial applications

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927085 ◽

2017 ◽

Cited By ~ 3

Author(s):

Menbere Tekleyohannes ◽

Mohammadsadegh Sadri ◽

Christian Weis ◽

Norbert Wehn ◽

Martin Klein ◽

...

Keyword(s):

Component Analysis ◽

Industrial Applications ◽

Connected Component ◽

Connected Component Analysis ◽

Embedded Architecture

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Towards exascale computing with heterogeneous architectures

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927023 ◽

2017 ◽

Cited By ~ 3

Author(s):

Kenneth O'Brien ◽

Lorenzo Di Tucci ◽

Gianluca Durelli ◽

Michaela Blott

Keyword(s):

Exascale Computing ◽

Heterogeneous Architectures

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Noise-sensitive feedback loop identification in linear time-varying analog circuits

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927190 ◽

2017 ◽

Cited By ~ 1

Author(s):

Ang Li ◽

Peng Li ◽

Tingwen Huang ◽

Edgar Sanchez-Sinencio

Keyword(s):

Analog Circuits ◽

Feedback Loop ◽

Linear Time ◽

Time Varying

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MALRU: Miss-penalty aware LRU-based cache replacement for hybrid memory systems

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927151 ◽

2017 ◽

Cited By ~ 7

Author(s):

Di Chen ◽

Hai Jin ◽

Xiaofei Liao ◽

Haikun Liu ◽

Rentong Guo ◽

...

Keyword(s):

Memory Systems ◽

Cache Replacement ◽

Hybrid Memory

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Understanding the impact of precision quantization on the accuracy and energy of neural networks

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927224 ◽

2017 ◽

Cited By ~ 19

Author(s):

Soheil Hashemi ◽

Nicholas Anthony ◽

Hokchhay Tann ◽

R. Iris Bahar ◽

Sherief Reda

Keyword(s):

Neural Networks ◽

The Impact

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GPIOCP: Timing-accurate general purpose I/O controller for many-core real-time systems

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927099 ◽

2017 ◽

Cited By ~ 1

Author(s):

Zhe Jiang ◽

Neil C. Audsley

Keyword(s):

Real Time ◽

General Purpose ◽

Real Time Systems ◽

Many Core ◽

Time Systems

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Automating the pipeline of arithmetic datapaths

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 ◽

10.23919/date.2017.7927080 ◽

2017 ◽

Cited By ~ 3

Author(s):

Matei Istoan ◽

Florent de Dinechin

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Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

INSPEX: Design and integration of a portable/wearable smart spatial exploration system

3DFAR: A three-dimensional fabric for reliable multi-core processors

Advanced spintronic memory and logic for non-volatile processors

An advanced embedded architecture for connected component analysis in industrial applications

Towards exascale computing with heterogeneous architectures

Noise-sensitive feedback loop identification in linear time-varying analog circuits

MALRU: Miss-penalty aware LRU-based cache replacement for hybrid memory systems

Understanding the impact of precision quantization on the accuracy and energy of neural networks

GPIOCP: Timing-accurate general purpose I/O controller for many-core real-time systems

Automating the pipeline of arithmetic datapaths

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017
Latest Publications