IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370)
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First level package design considerations for the IBM's S/390 G5 server

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733490 ◽

2002 ◽

Cited By ~ 4

Author(s):

G. Katopis ◽

D. Becker ◽

H. Stoller

Keyword(s):

Package Design ◽

Design Considerations

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Electrical characterization of ball grid array packages from S-parameter measurements below 500 MHz

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733750 ◽

2002 ◽

Cited By ~ 1

Author(s):

Jaeyong Jeong ◽

Jichai Jeong

Keyword(s):

Electrical Characterization ◽

Ball Grid Array ◽

S Parameter ◽

Ball Grid Array Packages

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Novel microstrip-to-stripline transitions for leakage suppression in multilayer microwave circuits

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.734036 ◽

2002 ◽

Cited By ~ 7

Author(s):

J. Kim ◽

H.-Y. Lee ◽

T. Itoh

Keyword(s):

Microwave Circuits

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Characterization of frequency dependent dielectric packaging media using differential and multiple-reflection techniques on a precision stripline test structure

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733752 ◽

2002 ◽

Cited By ~ 1

Author(s):

C.C. Green ◽

J.M. Seligman ◽

J.L. Prince ◽

K.L. Virga

Keyword(s):

Test Structure ◽

Multiple Reflection ◽

Frequency Dependent

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Design methodology for on-chip interconnects

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733493 ◽

2002 ◽

Cited By ~ 2

Author(s):

M. Cases ◽

H. Smith ◽

M. Bowen

Keyword(s):

Design Methodology ◽

On Chip

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Modeling, simulation, and design methodology of the interconnect and packaging of an ultra-high speed source synchronous bus

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733489 ◽

2002 ◽

Cited By ~ 10

Author(s):

T. Arabi ◽

J. Jones ◽

G. Taylor ◽

D. Riendeau

Keyword(s):

High Speed ◽

Design Methodology ◽

Modeling Simulation ◽

Ultra High Speed

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Flip-chip power distribution

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733745 ◽

2002 ◽

Author(s):

S. Lipa ◽

J.T. Schaffer ◽

A.W. Glaser ◽

P.D. Franzon

Keyword(s):

Power Distribution ◽

Flip Chip

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Analytic modeling of monolithic inductors on semiconductor substrates

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733989 ◽

2002 ◽

Cited By ~ 1

Author(s):

S.-J. Yoo ◽

R. Friar ◽

D.P. Neikrik

Keyword(s):

Analytic Modeling ◽

Semiconductor Substrates

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Norton equivalent model of microprocessor core noise from measurements

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733972 ◽

2002 ◽

Cited By ~ 2

Author(s):

Y. Chen ◽

B. Young ◽

N. Pham

Keyword(s):

Equivalent Model

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ESR and ESL of ceramic capacitor applied to decoupling applications

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370) ◽

10.1109/epep.1998.733985 ◽

2002 ◽

Cited By ~ 29

Author(s):

T. Roy ◽

L. Smith ◽

J. Prymak

Keyword(s):

Ceramic Capacitor

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IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

First level package design considerations for the IBM's S/390 G5 server

Electrical characterization of ball grid array packages from S-parameter measurements below 500 MHz

Novel microstrip-to-stripline transitions for leakage suppression in multilayer microwave circuits

Characterization of frequency dependent dielectric packaging media using differential and multiple-reflection techniques on a precision stripline test structure

Design methodology for on-chip interconnects

Modeling, simulation, and design methodology of the interconnect and packaging of an ultra-high speed source synchronous bus

Flip-chip power distribution

Analytic modeling of monolithic inductors on semiconductor substrates

Norton equivalent model of microprocessor core noise from measurements

ESR and ESL of ceramic capacitor applied to decoupling applications

IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370)
Latest Publications