Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11
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9781450305549

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Eliminating the memory bottleneck

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950429 ◽

2011 ◽

Cited By ~ 16

Author(s):

Haohuan Fu ◽

Robert G. Clapp

Keyword(s):

Memory Bottleneck

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A monte-carlo floating-point unit for self-validating arithmetic

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950453 ◽

2011 ◽

Cited By ~ 2

Author(s):

Jackson H.C. Yeung ◽

Evangeline F.Y. Young ◽

Philip H.W. Leong

Keyword(s):

Monte Carlo ◽

Floating Point ◽

Floating Point Unit

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Fault modeling and characteristics of SRAM-based FPGAs (abstract only)

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950471 ◽

2011 ◽

Author(s):

Naifeng Jing ◽

Ju-Yueh Lee ◽

Chun Zhang ◽

Jiarong Tong ◽

Zhigang Mao ◽

...

Keyword(s):

Fault Modeling

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An accelerated and energy-efficient traffic monitor using the NetFPGA (abstract only)

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950464 ◽

2011 ◽

Cited By ~ 1

Author(s):

Alfio Lombardo ◽

Diego Reforgiato ◽

Giovanni Schembra

Keyword(s):

Energy Efficient

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An FPGA implementation of a sparse quadratic programming solver for constrained predictive control

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950454 ◽

2011 ◽

Cited By ~ 26

Author(s):

Juan Luis Jerez ◽

George Anthony Constantinides ◽

Eric C. Kerrigan

Keyword(s):

Quadratic Programming ◽

Predictive Control ◽

Fpga Implementation

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Improved double angle complex rotation QRD-RLS

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950431 ◽

2011 ◽

Author(s):

Qiang Gao ◽

Robert W. Stewart

Keyword(s):

Complex Rotation

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A chip-level path-delay-distribution based Dual-VDD method for low power FPGA (abstract only)

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950475 ◽

2011 ◽

Author(s):

Jianfeng Zhu ◽

Dong Wu ◽

Yaru Yan ◽

Xiao Yu ◽

Hu He ◽

...

Keyword(s):

Low Power ◽

Path Delay ◽

Delay Distribution

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A prototype FPGA for subthreshold-optimized CMOS (abstract only)

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950470 ◽

2011 ◽

Author(s):

Peter Grossmann ◽

Miriam Leeser

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High level synthesis for FPGAs applied to a sphere decoder channel preprocessor (abstract only)

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950468 ◽

2011 ◽

Cited By ~ 1

Author(s):

Sven van Haastregt ◽

Stephen Neuendorffer ◽

Kees Vissers ◽

Bart Kienhuis

Keyword(s):

High Level Synthesis ◽

Sphere Decoder ◽

High Level

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Authenticated encryption for FPGA bitstreams

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11 ◽

10.1145/1950413.1950432 ◽

2011 ◽

Cited By ~ 15

Author(s):

Stephen Trimberger ◽

Jason Moore ◽

Weiguang Lu

Keyword(s):

Authenticated Encryption

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Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Eliminating the memory bottleneck

A monte-carlo floating-point unit for self-validating arithmetic

Fault modeling and characteristics of SRAM-based FPGAs (abstract only)

An accelerated and energy-efficient traffic monitor using the NetFPGA (abstract only)

An FPGA implementation of a sparse quadratic programming solver for constrained predictive control

Improved double angle complex rotation QRD-RLS

A chip-level path-delay-distribution based Dual-VDD method for low power FPGA (abstract only)

A prototype FPGA for subthreshold-optimized CMOS (abstract only)

High level synthesis for FPGAs applied to a sphere decoder channel preprocessor (abstract only)

Authenticated encryption for FPGA bitstreams

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '11
Latest Publications