2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

Bonding based channel transfer and low temperature process for monolithic 3D integration platform development

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804407 ◽

2016 ◽

Cited By ~ 1

Author(s):

Rino Choi ◽

Hyun-Yong Yu ◽

Hyungsub Kim ◽

Han-Youl Ryu ◽

Hee-Kyung Bae ◽

...

Keyword(s):

Low Temperature ◽

3D Integration ◽

Integration Platform ◽

Platform Development ◽

Low Temperature Process

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Low power highly linear temperature sensor based on SOI lateral PIN diodes

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804382 ◽

2016 ◽

Cited By ~ 1

Author(s):

Michelly de Souza ◽

Marcelo Antonio Pavanello ◽

Denis Flandre

Keyword(s):

Low Power ◽

Temperature Sensor ◽

Pin Diodes ◽

Linear Temperature

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Silicon thickness variation of FD-SOI wafers investigated by differential reflective microscopy

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804378 ◽

2016 ◽

Author(s):

J. Auerhammer ◽

C. Hartig ◽

K. Wendt ◽

R. van Oostrum ◽

G. Pfeiffer ◽

...

Keyword(s):

Thickness Variation ◽

Silicon Thickness

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Influence of the crystal orientation on the operation of junctionless nanowire transistors

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804380 ◽

2016 ◽

Cited By ~ 2

Author(s):

Renan Trevisoli ◽

Rodrigo T. Doria ◽

Michelly de Souza ◽

Marcelo A. Pavanello ◽

Sylvain Barraud ◽

...

Keyword(s):

Crystal Orientation ◽

Nanowire Transistors

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A 1.95GHz 28dBm fully integrated packaged power amplifier presenting a 3G FOM of 80 (PAE+ACLR) designed in H9SOIFEM CMOS 130nm: Development of an optimized high performances RF SOI power cell

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804390 ◽

2016 ◽

Cited By ~ 2

Author(s):

Vincent Knopik ◽

Guillaume Bertrand ◽

Augustin Monroy ◽

Sylvie Gachon ◽

Julien Morelle ◽

...

Keyword(s):

Power Amplifier ◽

Fully Integrated ◽

Power Cell

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A 64 kb multi-threshold SRAM array with novel differential 8T bitcell in 32 nm SOI CMOS technology

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804388 ◽

2016 ◽

Author(s):

Samira Ataei ◽

James E. Stine

Keyword(s):

Cmos Technology ◽

Soi Cmos

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Design, fabrication, and characterization of ultralow current operational-amplifier in the weak inversion mode in XFAB-XT018 technology

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804392 ◽

2016 ◽

Cited By ~ 1

Author(s):

Farzin Akbar ◽

Marco Ramsbeck ◽

Elias Kogel

Keyword(s):

Operational Amplifier ◽

Weak Inversion ◽

Inversion Mode ◽

Fabrication And Characterization ◽

Current Operational Amplifier

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Towards fully integrated 28nm UTBB FD-SOI IoT node: The sub-50μW RF receiver

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804391 ◽

2016 ◽

Cited By ~ 3

Author(s):

B. Martineau ◽

C. Jany ◽

F. Todeschini ◽

D. Morche ◽

E. Mercier

Keyword(s):

Fully Integrated ◽

Rf Receiver

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An all-digital PLL with SAR frequency locking system in 65nm SOTB CMOS

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804397 ◽

2016 ◽

Author(s):

Keita Arai ◽

Cong-Kha Pham

Keyword(s):

Frequency Locking

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Down to 15nm BOX: SOI extendability for planar fully depleted application beyond 22FD

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2016.7804377 ◽

2016 ◽

Cited By ~ 2

Author(s):

W. Schwarzenbach ◽

F. Allibert ◽

C. Le Royer ◽

L. Grenouillet ◽

C. Malaquin ◽

...

Keyword(s):

Fully Depleted

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2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Bonding based channel transfer and low temperature process for monolithic 3D integration platform development

Low power highly linear temperature sensor based on SOI lateral PIN diodes

Silicon thickness variation of FD-SOI wafers investigated by differential reflective microscopy

Influence of the crystal orientation on the operation of junctionless nanowire transistors

A 1.95GHz 28dBm fully integrated packaged power amplifier presenting a 3G FOM of 80 (PAE+ACLR) designed in H9SOIFEM CMOS 130nm: Development of an optimized high performances RF SOI power cell

A 64 kb multi-threshold SRAM array with novel differential 8T bitcell in 32 nm SOI CMOS technology

Design, fabrication, and characterization of ultralow current operational-amplifier in the weak inversion mode in XFAB-XT018 technology

Towards fully integrated 28nm UTBB FD-SOI IoT node: The sub-50μW RF receiver

An all-digital PLL with SAR frequency locking system in 65nm SOTB CMOS

Down to 15nm BOX: SOI extendability for planar fully depleted application beyond 22FD

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2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Bonding based channel transfer and low temperature process for monolithic 3D integration platform development

Low power highly linear temperature sensor based on SOI lateral PIN diodes

Silicon thickness variation of FD-SOI wafers investigated by differential reflective microscopy

Influence of the crystal orientation on the operation of junctionless nanowire transistors

A 1.95GHz 28dBm fully integrated packaged power amplifier presenting a 3G FOM of 80 (PAE+ACLR) designed in H9SOIFEM CMOS 130nm: Development of an optimized high performances RF SOI power cell

A 64 kb multi-threshold SRAM array with novel differential 8T bitcell in 32 nm SOI CMOS technology

Design, fabrication, and characterization of ultralow current operational-amplifier in the weak inversion mode in XFAB-XT018 technology

Towards fully integrated 28nm UTBB FD-SOI IoT node: The sub-50μW RF receiver

An all-digital PLL with SAR frequency locking system in 65nm SOTB CMOS

Down to 15nm BOX: SOI extendability for planar fully depleted application beyond 22FD

2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
Latest Publications