2018 China Semiconductor Technology International Conference (CSTIC)
Latest Publications

TOTAL DOCUMENTS

177

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781538653081

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Zero lag dispense to increase the etching uniformity in a single wafer wet cleaner

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369238 ◽

2018 ◽

Author(s):

Wei Liu ◽

Xiaoyan Liu ◽

Yi Wu

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Management of TEOS-CVD process tool exhausts in 3D-NAND manufacturing

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369246 ◽

2018 ◽

Author(s):

Andrew A. Chambers

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PVD systems for advanced packaging applications

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369245 ◽

2018 ◽

Author(s):

Jinguo Zhen ◽

Kuanmao Wang ◽

Wei Xia ◽

Hougong Wang ◽

Peijun Ding

Keyword(s):

Advanced Packaging

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STI scratch defects reduction by using solid pad in 1X technology node

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369263 ◽

2018 ◽

Author(s):

Kuang-Wei Chen ◽

Yen-Ting Chen ◽

Chun-Fu Chen ◽

Tuung Luoh ◽

Lin-Wuu Yang ◽

...

Keyword(s):

Technology Node

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Impact of TID radiation on hot-carrier effects in 65NM bulk Si NMOSFETs

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369270 ◽

2018 ◽

Author(s):

Zhexuan Ren ◽

Xia An ◽

Jianing Wang ◽

Xing Zhang ◽

Ru Huang

Keyword(s):

Hot Carrier ◽

Hot Carrier Effects

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Achieving mastery in chip manufacturing

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369282 ◽

2018 ◽

Author(s):

Cyril-Patrick Fernandez ◽

Jim Jensen

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2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369340 ◽

2018 ◽

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Fan-out wafer-level packaging for 3D IC heterogeneous integration

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369300 ◽

2018 ◽

Cited By ~ 4

Author(s):

John H Lau

Keyword(s):

Heterogeneous Integration ◽

Wafer Level ◽

3D Ic ◽

Wafer Level Packaging

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Study of unique pseudo buried layer in 0.18um SiGe BiCMOS process

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369223 ◽

2018 ◽

Author(s):

Donghua Liu ◽

Xi Chen ◽

David Wei Zhang

Keyword(s):

Sige Bicmos ◽

Bicmos Process ◽

Buried Layer

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The development of novel STI spacer in an EPI free SiGe BiCMOS Process

2018 China Semiconductor Technology International Conference (CSTIC) ◽

10.1109/cstic.2018.8369225 ◽

2018 ◽

Author(s):

Donghua Liu ◽

Ziquan Fang ◽

Wensheng Qian

Keyword(s):

Sige Bicmos ◽

Bicmos Process

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2018 China Semiconductor Technology International Conference (CSTIC)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Zero lag dispense to increase the etching uniformity in a single wafer wet cleaner

Management of TEOS-CVD process tool exhausts in 3D-NAND manufacturing

PVD systems for advanced packaging applications

STI scratch defects reduction by using solid pad in 1X technology node

Impact of TID radiation on hot-carrier effects in 65NM bulk Si NMOSFETs

Achieving mastery in chip manufacturing

Table of contents

Fan-out wafer-level packaging for 3D IC heterogeneous integration

Study of unique pseudo buried layer in 0.18um SiGe BiCMOS process

The development of novel STI spacer in an EPI free SiGe BiCMOS Process

Export Citation Format

2018 China Semiconductor Technology International Conference (CSTIC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Zero lag dispense to increase the etching uniformity in a single wafer wet cleaner

Management of TEOS-CVD process tool exhausts in 3D-NAND manufacturing

PVD systems for advanced packaging applications

STI scratch defects reduction by using solid pad in 1X technology node

Impact of TID radiation on hot-carrier effects in 65NM bulk Si NMOSFETs

Achieving mastery in chip manufacturing

Table of contents

Fan-out wafer-level packaging for 3D IC heterogeneous integration

Study of unique pseudo buried layer in 0.18um SiGe BiCMOS process

The development of novel STI spacer in an EPI free SiGe BiCMOS Process

2018 China Semiconductor Technology International Conference (CSTIC)
Latest Publications