FPGA on Cyber-Physical Systems for the Implementation of Internet of Things

Today, in cyber-physical systems, there is a transformation in which processing has been done on distributed mode rather than performing on centralized manner. Usually this type of approach is known as Edge computing, which demands hardware time to time when requirements in computing performance get increased. Considering this situation, we must remain energy efficient and adaptable. So, to meet the above requirements, SRAM-based FPGAs and their inherent run-time reconfigurability are integrated with smart power management strategies. Sometimes this approach fails in the case of user accessibility and easy development. This chapter presents an integrated framework to develop FPGA-based high-performance embedded systems for Edge computing in cyber-physical systems. The processing architecture will be based on hardware that helps us to manage reconfigurable systems from high level systems without any human intervention.

Challenges in FPGA Technology Paradigm for the Implementation of IoT Applications

Internet of things (IoT) is a recent technology, and it will become the next generation of internet that connects several physical objects to interact amongst themselves without the assistance of human beings. It plays a significant role in our day-to-day lives and is used in several applications. IoT is a boon to this modern world, but it lacks in security. It cannot protect the user data from assailants, hackers, and vulnerabilities. Field programmable gate arrays (FPGA) helps to achieve all these objectives by incorporating secured end-to-end layer into its architecture. In this chapter, ultralow power and reduced area AES architecture with energy efficient DSE-S box techniques and clock gating for IoT applications are introduced. The proposed AES architecture is implemented over different FPGA families such as Cyclone I, Cyclone II, Virtex 5, and Kintex 7, respectively. From the experimental results, it is observed that the Kintex 7 FPGA kit consumes less power than other FPGA families.

Multi-Processor Job Scheduling in High-Performance Computing (HPC) Systems

Processor scheduling is one of the thrust areas in the field of computer science. The future technologies use a huge amount of processors for execution of their tasks like huge games, programming software, and in the field of quantum computing. In hard real-time, many complex problems are solved by GPU programming. The primary concern of scheduling is to reduce the time complexity and manpower. There are several traditional techniques for processor scheduling. The performance of traditional techniques is reduced when it comes under huge processing of tasks. Most scheduling problems are NP-hard in nature. Many of the complex problems are recently solved by the GPU programming. GPU scheduling is another complex issue as it runs thousands of threads in parallel and needs to be scheduled efficiently. For such large-scale scheduling problem, the performance of state-of-the-art algorithms is very poor. It is observed that evolutionary and genetic-based algorithms exhibit better performance for large-scale combinatorial problems.

Wireless Sensor Networking in Biomedical Engineering

Wireless sensor networking plays an important role in sensor signal communication and data transfer. The WSN is one of the trending fields in medical data mining. WSN provides the connecting link between the real physical world and virtual environment. In this study, the various WSN network algorithm, topologies, architectures, and their applications to medical technology are discussed. This study will be useful for the readers to know about various communicative technologies and standards followed in biomedical technology.

High-Performance Computing Using FPGAs for Improving the DTC Performances of Induction Motors

The conventional direct torque control (DTC) of induction motors has become the most used control strategy. This control method is known by its simplicity, fast torque response, and its lack of dependence on machine parameters. Despite the cited advantages, the conventional DTC suffers from several limitations, like the torque ripples. This chapter aims to improve the conventional DTC performances by keeping its advantages. These ripples depend on the hysteresis bandwidth of the torque and the sampling frequency. The conventional DTC limitations can be prevented by increasing the sampling frequency. Nevertheless, the operation with higher sampling frequency is not possible with the software solutions, like the digital signal processor (DSP), due to the serial processing of the implemented algorithm. To overcome the DSP limitations, the field programmable gate array (FPGA) can be chosen as an alternative solution to implement the DTC algorithm with shorter execution time. In this chapter, the FPGA is chosen thanks to its parallel processing.

Smart Automotive Systems Supported by Configurable FPGA, IoT, and Artificial Intelligence Techniques

Modern vehicles are very complex by incorporating various computational signals and critical information transactions. Electronic control units (ECUs) are embedded with various software functions, network information, sensor/actuator communication, and dedicated hardware. Altogether, the special hardware needs to be adaptable to the current needs of next-generation vehicles. This chapter will give a broad idea about modern automotive systems by considering various factors. Finding the best reconfigurable field programmable gate array (FPGA)-based hardware, intelligent assistance systems for drivers and various communication protocols are elaborated in this chapter. Moreover, it also provides the essential knowledge of IoT-based smart automotive systems along with its pros and cons. This chapter also gives the awareness and comparative study of artificial intelligence (AI) systems in the present smart automotive systems. The overall observation of this chapter will satisfy the audience by knowing the reconfigurable FPGA, IoT, and artificial intelligence-based automotive systems.

Neuroscience in FPGA and Application in IoT

Neuroscience is a multidisciplinary science that is focused with the study of the structure and function of the nervous system. It contains the evolution, development, cellular and molecular biology, physiology, anatomy, and pharmacology of the nervous system, as well as computational, interactive, and cognitive neuroscience. A field-programmable gate array (FPGA) is an integrated circuit (IC) that can be programmed in the field after production. FPGAs are likely in principle to have vastly wider potential application than programmable read-only memory (PROM) chips. Internet of things (IoT) is an integrated part of future internet including existing and evolving internet and network developments and could be conceptually defined as a worldwide dynamic network infrastructure with self-configuring capabilities based on standard and interoperable protocols communication where physical and virtual “things” have identities, physical attributes, and virtual personalities.

FPGA Memory Optimization in High-Level Synthesis

High-level synthesis (HLS) with FPGA can achieve significant performance improvements through effective memory partitioning and meticulous data reuse. In this chapter, the authors will first explore techniques that have been adopted directly from systems that possess a fixed memory subsystem such as CPUs and GPUs (Section 2). Section 3 will focus on techniques that have been developed specifically for reconfigurable architectures which generate custom memory subsystems to take advantage of the peculiarities of a family of affine code called stencil code. The authors will focus on techniques that exploit memory banking to allow for parallel, conflict-free memory accesses in Section 3.1 and techniques that generate an optimal memory micro-architecture for data reuse in Section 3.2. Finally, Section 4 will explore the technique handling code still belonging to the affine family but the relative distance between the addresses.

Use of FPGAs for Enabling Security and Privacy in the IoT

In this chapter, the authors discuss the utilization of FPGA technology in providing the Internet of Things (IoT) with security and privacy services through means of cryptographic realizations. The first part of the chapter focuses on the practical aspects of using FPGAs for providing the IoT with security and privacy. The authors explore the feasibility of using these devices in constrained environments and the features attractive for their use in security applications. The second part is a revision of case studies reported in the literature where FPGAs have been employed for security applications in the context of IoT and related technologies. The main goal of this chapter is to present a general perspective of the role played by FPGA technologies in protecting the IoT.