Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.
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Wire delay is not a problem for SMT (in the near future)

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310762 ◽

2004 ◽

Cited By ~ 9

Author(s):

Z. Chishti ◽

T.N. Vijaykumar

Keyword(s):

Wire Delay ◽

Near Future

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X-RAY: a non-invasive exclusive caching mechanism for RAIDs

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310773 ◽

2004 ◽

Cited By ~ 3

Author(s):

L.N. Bairavasundaram ◽

M. Sivathanu ◽

A.C. Arpaci-Dusseau ◽

R.H. Arpaci-Dusseau

Keyword(s):

X Ray ◽

Non Invasive ◽

Caching Mechanism

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Evaluation of the raw microprocessor: an exposed-wire-delay architecture for ILP and streams

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310759 ◽

2004 ◽

Cited By ~ 46

Author(s):

M.B. Taylor ◽

W. Lee ◽

J. Miller ◽

D. Wentzlaff ◽

I. Bratt ◽

...

Keyword(s):

Wire Delay

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Single-ISA heterogeneous multi-core architectures for multithreaded workload performance

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310764 ◽

2004 ◽

Cited By ~ 192

Author(s):

R. Kumar ◽

D.M. Tullsen ◽

P. Ranganathan ◽

N.P. Jouppi ◽

K.I. Farkas

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The case for lifetime reliability-aware microprocessors

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310781 ◽

2004 ◽

Cited By ~ 170

Author(s):

J. Srinivasan ◽

S.V. Adve ◽

P. Bose ◽

J.A. Rivers

Keyword(s):

Lifetime Reliability

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A complexity-effective approach to ALU bandwidth enhancement for instruction-level temporal redundancy

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310789 ◽

2004 ◽

Cited By ~ 25

Author(s):

A. Parashar ◽

S. Gurumurthi ◽

A. Sivasubramaniam

Keyword(s):

Bandwidth Enhancement ◽

Temporal Redundancy

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Synchroscalar: a multiple clock domain, power-aware, tile-based embedded processor

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310771 ◽

2004 ◽

Cited By ~ 6

Author(s):

J. Oliver ◽

R. Rao ◽

P. Sultana ◽

J. Crandall ◽

E. Czernikowski ◽

...

Keyword(s):

Embedded Processor

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Low-latency virtual-channel routers for on-chip networks

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310774 ◽

2004 ◽

Cited By ~ 157

Author(s):

R. Mullins ◽

A. West ◽

S. Moore

Keyword(s):

Low Latency ◽

Virtual Channel ◽

On Chip

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Evaluating the imagine stream architecture

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310760 ◽

2004 ◽

Cited By ~ 15

Author(s):

Jung Ho Ahn ◽

W.J. Dally ◽

B. Khailany ◽

U.J. Kapasi ◽

A. Das

Keyword(s):

Stream Architecture

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Use-based register caching with decoupled indexing

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004. ◽

10.1109/isca.2004.1310783 ◽

2004 ◽

Cited By ~ 16

Author(s):

J.A. Butts ◽

G.S. Sohi

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Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Wire delay is not a problem for SMT (in the near future)

X-RAY: a non-invasive exclusive caching mechanism for RAIDs

Evaluation of the raw microprocessor: an exposed-wire-delay architecture for ILP and streams

Single-ISA heterogeneous multi-core architectures for multithreaded workload performance

The case for lifetime reliability-aware microprocessors

A complexity-effective approach to ALU bandwidth enhancement for instruction-level temporal redundancy

Synchroscalar: a multiple clock domain, power-aware, tile-based embedded processor

Low-latency virtual-channel routers for on-chip networks

Evaluating the imagine stream architecture

Use-based register caching with decoupled indexing

Proceedings. 31st Annual International Symposium on Computer Architecture, 2004.
Latest Publications