Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07
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978195938077

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Building a large instruction window through ROB compression

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327176 ◽

2007 ◽

Author(s):

Fernando Latorre ◽

Grigorios Magklis ◽

José González ◽

Pedro Chaparro ◽

Antonio González

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Parallelization schemes for memory optimization on the cell processor

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327172 ◽

2007 ◽

Cited By ~ 3

Author(s):

Tarik Saidani ◽

Stéphane Piskorski ◽

Lionel Lacassagne ◽

Samir Bouaziz

Keyword(s):

Cell Processor ◽

Memory Optimization

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Improving the accuracy of snoop filtering using stream registers

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327174 ◽

2007 ◽

Cited By ~ 11

Author(s):

Valentina Salapura ◽

Matthias Blumrich ◽

Alan Gara

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A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327185 ◽

2007 ◽

Cited By ~ 2

Author(s):

Isao Kotera ◽

Ryusuke Egawa ◽

Hiroyuki Takizawa ◽

Hiroaki Kobayashi

Keyword(s):

Shared Cache ◽

Memory Reference ◽

Cache Mechanism

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The STAPL pArray

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327180 ◽

2007 ◽

Cited By ~ 5

Author(s):

Gabriel Tanase ◽

Mauro Bianco ◽

Nancy M. Amato ◽

Lawrence Rauchwerger

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Improving disk bandwidth-bound applications through main memory compression

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327178 ◽

2007 ◽

Cited By ~ 4

Author(s):

Vicenç Beltran ◽

Jordi Torres ◽

Eduard Ayguadé

Keyword(s):

Main Memory ◽

Memory Compression

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An on-chip cache design for vector processors

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327173 ◽

2007 ◽

Cited By ~ 7

Author(s):

Akihiro Musa ◽

Yoshiei Sato ◽

Ryusuke Egawa ◽

Hiroyuki Takizawa ◽

Koki Okabe ◽

...

Keyword(s):

Vector Processors ◽

On Chip ◽

Cache Design

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Multithreaded software transactional memory and OpenMP

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327181 ◽

2007 ◽

Cited By ~ 7

Author(s):

Miloš Milovanović ◽

Roger Ferrer ◽

Vladimir Gajinov ◽

Osman S. Unsal ◽

Adrian Cristal ◽

...

Keyword(s):

Transactional Memory ◽

Software Transactional Memory

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Analysis of static and dynamic energy consumption in NUCA caches

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327184 ◽

2007 ◽

Cited By ~ 27

Author(s):

Alessandro Bardine ◽

Pierfrancesco Foglia ◽

Giacomo Gabrielli ◽

Cosimo Antonio Prete

Keyword(s):

Energy Consumption

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Characterization of Apache web server with Specweb2005

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07 ◽

10.1145/1327171.1327179 ◽

2007 ◽

Cited By ~ 4

Author(s):

Ana Bosque ◽

Pablo Ibañez ◽

Víctor Viñals ◽

Per Stenström ◽

Jose M. Llabería

Keyword(s):

Web Server

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Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Building a large instruction window through ROB compression

Parallelization schemes for memory optimization on the cell processor

Improving the accuracy of snoop filtering using stream registers

A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs

The STAPL pArray

Improving disk bandwidth-bound applications through main memory compression

An on-chip cache design for vector processors

Multithreaded software transactional memory and OpenMP

Analysis of static and dynamic energy consumption in NUCA caches

Characterization of Apache web server with Specweb2005

Proceedings of the 2007 workshop on MEmory performance DEaling with Applications, systems and architecture - MEDEA '07
Latest Publications