Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90
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The TLB slice---a low-cost high-speed address translation mechanism

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325161 ◽

1990 ◽

Cited By ~ 26

Author(s):

George Taylor ◽

Peter Davies ◽

Michael Farmwald

Keyword(s):

High Speed ◽

Low Cost ◽

Address Translation ◽

Translation Mechanism

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Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325162 ◽

1990 ◽

Cited By ~ 272

Author(s):

Norman P. Jouppi

Keyword(s):

Cache Performance

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Generation and analysis of very long address traces

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325153 ◽

1990 ◽

Cited By ~ 20

Author(s):

Anita Borg ◽

R. E. Kessler ◽

David W. Wall

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Maximizing performance in a striped disk array

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325158 ◽

1990 ◽

Cited By ~ 31

Author(s):

Peter M. Chen ◽

David A. Patterson

Keyword(s):

Disk Array

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The directory-based cache coherence protocol for the DASH multiprocessor

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325132 ◽

1990 ◽

Cited By ~ 101

Author(s):

Daniel Lenoski ◽

James Laudon ◽

Kourosh Gharachorloo ◽

Anoop Gupta ◽

John Hennessy

Keyword(s):

Cache Coherence ◽

Cache Coherence Protocol

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Adaptive software cache management for distributed shared memory architectures

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325124 ◽

1990 ◽

Cited By ~ 31

Author(s):

John K. Bennett ◽

John B. Carter ◽

Willy Zwaenepoel

Keyword(s):

Shared Memory ◽

Distributed Shared Memory ◽

Cache Management ◽

Adaptive Software ◽

Memory Architectures ◽

Shared Memory Architectures ◽

Software Cache

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Performance comparison of load/store and symmetric instruction set architectures

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325137 ◽

1990 ◽

Cited By ~ 1

Author(s):

D. Alpert ◽

A. Averbuch ◽

O. Danieli

Keyword(s):

Performance Comparison ◽

Instruction Set

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Virtual-channel flow control

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325115 ◽

1990 ◽

Cited By ~ 33

Author(s):

William J. Dally

Keyword(s):

Flow Control ◽

Channel Flow ◽

Virtual Channel

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Big science versus little science---do you have to build it? (panel session)

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325126 ◽

1990 ◽

Author(s):

David R. Ditzel ◽

John L. Hennessy ◽

Bernie Rudin ◽

Alan Jay Smith ◽

Stephen L. Squires ◽

...

Keyword(s):

Big Science ◽

Panel Session

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The performance impact of block sizes and fetch strategies

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90 ◽

10.1145/325164.325135 ◽

1990 ◽

Cited By ~ 10

Author(s):

Steven Przybylski

Keyword(s):

Performance Impact ◽

Block Sizes

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Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

The TLB slice---a low-cost high-speed address translation mechanism

Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers

Generation and analysis of very long address traces

Maximizing performance in a striped disk array

The directory-based cache coherence protocol for the DASH multiprocessor

Adaptive software cache management for distributed shared memory architectures

Performance comparison of load/store and symmetric instruction set architectures

Virtual-channel flow control

Big science versus little science---do you have to build it? (panel session)

The performance impact of block sizes and fetch strategies

Proceedings of the 17th annual international symposium on Computer Architecture - ISCA '90
Latest Publications