Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04
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Facilitating reuse in hardware models with enhanced type inference

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016744 ◽

2004 ◽

Cited By ~ 1

Author(s):

Manish Vachharajani ◽

Neil Vachharajani ◽

Sharad Malik ◽

David I. August

Keyword(s):

Type Inference

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Transaction level modeling

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016742 ◽

2004 ◽

Cited By ~ 64

Author(s):

Adam Donlin

Keyword(s):

Transaction Level Modeling ◽

Transaction Level

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Multi-objective mapping for mesh-based NoC architectures

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016765 ◽

2004 ◽

Cited By ~ 40

Author(s):

Giuseppe Ascia ◽

Vincenzo Catania ◽

Maurizio Palesi

Keyword(s):

Multi Objective

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Current flattening in software and hardware for security applications

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016773 ◽

2004 ◽

Cited By ~ 5

Author(s):

Radu Muresan ◽

Catherine Gebotys

Keyword(s):

Security Applications ◽

Software And Hardware

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Low energy security optimization in embedded cryptographic systems

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016774 ◽

2004 ◽

Cited By ~ 12

Author(s):

Catherine H. Gebotys

Keyword(s):

Energy Security ◽

Low Energy

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Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016738 ◽

2004 ◽

Cited By ~ 5

Author(s):

Xinping Zhu ◽

Wei Qin ◽

Sharad Malik

Keyword(s):

Communication Architectures

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Analytical models for leakage power estimation of memory array structures

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016757 ◽

2004 ◽

Cited By ~ 14

Author(s):

Mahesh Mamidipaka ◽

Kamal Khouri ◽

Nikil Dutt ◽

Magdy Abadir

Keyword(s):

Power Estimation ◽

Leakage Power ◽

Analytical Models ◽

Memory Array ◽

Array Structures

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Efficient search space exploration for HW-SW partitioning

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016752 ◽

2004 ◽

Cited By ~ 21

Author(s):

Sudarshan Banerjee ◽

Nikil Dutt

Keyword(s):

Space Exploration ◽

Search Space ◽

Efficient Search

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Optimizing the memory bandwidth with loop fusion

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016767 ◽

2004 ◽

Cited By ~ 15

Author(s):

Paul Marchal ◽

José Ignacio Gómez ◽

Francky Catthoor

Keyword(s):

Memory Bandwidth ◽

Loop Fusion

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Fast co-simulation of transformative systems with OS support on SMP computer

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04 ◽

10.1145/1016720.1016761 ◽

2004 ◽

Author(s):

Zhengting He ◽

Aloysius Mok

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Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Facilitating reuse in hardware models with enhanced type inference

Transaction level modeling

Multi-objective mapping for mesh-based NoC architectures

Current flattening in software and hardware for security applications

Low energy security optimization in embedded cryptographic systems

Modeling operation and microarchitecture concurrency for communication architectures with application to retargetable simulation

Analytical models for leakage power estimation of memory array structures

Efficient search space exploration for HW-SW partitioning

Optimizing the memory bandwidth with loop fusion

Fast co-simulation of transformative systems with OS support on SMP computer

Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '04
Latest Publications