Asynchronous Circuit Design for VLSI Signal Processing
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Published By Springer US

9781461362081, 9781461527947

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Verification of Asynchronous Interface Circuits with Bounded Wire Delays

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_11 ◽

1994 ◽

pp. 161-182

Author(s):

Srinivas Devadas ◽

Kurt Keutzer ◽

Sharad Malik ◽

Albert Wang

Keyword(s):

Interface Circuits

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Editorial

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_1 ◽

1994 ◽

pp. 5-6

Author(s):

Teresa H. Meng ◽

Sharad Malik

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High-Level Optimizations in Compiling Process Descriptions to Asynchronous Circuits

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_4 ◽

1994 ◽

pp. 33-45

Author(s):

Ganesh Gopalakrishnan ◽

Venkatesh Akella

Keyword(s):

Asynchronous Circuits ◽

High Level

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A Generalized State Assignment Theory for Transformations on Signal Transition Graphs

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_8 ◽

1994 ◽

pp. 101-115 ◽

Cited By ~ 1

Author(s):

Peter Vanbekbergen ◽

Bill Lin ◽

Gert Goossens ◽

Hugo De Man

Keyword(s):

State Assignment ◽

Generalized State ◽

Transition Graphs

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Specification and Analysis of Self-Timed Circuits

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_9 ◽

1994 ◽

pp. 117-135

Author(s):

M. A. Kishinevsky ◽

A. Yu. Kondratyev ◽

A. R. Taubin

Keyword(s):

Timed Circuits

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Specification, Synthesis, and Verification of Hazard-Free Asynchronous Circuits

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_7 ◽

1994 ◽

pp. 85-100 ◽

Cited By ~ 1

Author(s):

Cho W. Moon ◽

Paul R. Stephan ◽

Robert K. Brayton

Keyword(s):

Asynchronous Circuits ◽

Specification Synthesis

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Synthesis of Hazard-Free Control Circuits from Asynchronous Finite State Machines Specifications

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_6 ◽

1994 ◽

pp. 61-84 ◽

Cited By ~ 1

Author(s):

Tam-Anh Chu

Keyword(s):

Finite State Machines ◽

State Machines ◽

Finite State ◽

Control Circuits

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Performance of Iterative Computation in Self-Timed Rings

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_3 ◽

1994 ◽

pp. 17-31

Author(s):

Ted E. Williams

Keyword(s):

Iterative Computation

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Designing Self-Timed Systems Using Concurrent Programs

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_5 ◽

1994 ◽

pp. 47-59

Author(s):

Erik Brunvand

Keyword(s):

Concurrent Programs ◽

Timed Systems

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Self-Timed Logic Using Current-Sensing Completion Detection (CSCD)

Asynchronous Circuit Design for VLSI Signal Processing ◽

10.1007/978-1-4615-2794-7_2 ◽

1994 ◽

pp. 7-16 ◽

Cited By ~ 2

Author(s):

Mark E. Dean ◽

David L. Dill ◽

Mark Horowitz

Keyword(s):

Current Sensing

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Asynchronous Circuit Design for VLSI Signal ProcessingLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer US

Verification of Asynchronous Interface Circuits with Bounded Wire Delays

Editorial

High-Level Optimizations in Compiling Process Descriptions to Asynchronous Circuits

A Generalized State Assignment Theory for Transformations on Signal Transition Graphs

Specification and Analysis of Self-Timed Circuits

Specification, Synthesis, and Verification of Hazard-Free Asynchronous Circuits

Synthesis of Hazard-Free Control Circuits from Asynchronous Finite State Machines Specifications

Performance of Iterative Computation in Self-Timed Rings

Designing Self-Timed Systems Using Concurrent Programs

Self-Timed Logic Using Current-Sensing Completion Detection (CSCD)

Asynchronous Circuit Design for VLSI Signal Processing
Latest Publications