The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization
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Published By Springer US

9781461363811, 9781461531548

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A New Algorithm for 0-1 Programming Based on Binary Decision Diagrams

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_7 ◽

1993 ◽

pp. 145-165 ◽

Cited By ~ 5

Author(s):

Seh-Woong Jeong ◽

Fabio Somenzi

Keyword(s):

Binary Decision Diagrams ◽

Decision Diagrams ◽

Binary Decision

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A Partitioning Method for Area Optimization by Tree Analysis

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_6 ◽

1993 ◽

pp. 127-143 ◽

Cited By ~ 1

Author(s):

Yuichi Nakamura ◽

Kazutoshi Wakabayashi ◽

Tomoyuki Fujita

Keyword(s):

Tree Analysis ◽

Area Optimization

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A New Technology Mapping Method Based on Concurrent Factorization and Mapping

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_15 ◽

1993 ◽

pp. 323-340

Author(s):

Minoru Inamori ◽

Atsushi Takahara

Keyword(s):

New Technology ◽

Mapping Method ◽

Technology Mapping

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And-Exor Expressions and their Optimization

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_13 ◽

1993 ◽

pp. 287-312 ◽

Cited By ~ 41

Author(s):

Tsutomu Sasao

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Delay Models and Exact Timing Analysis

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_8 ◽

1993 ◽

pp. 167-189 ◽

Cited By ~ 27

Author(s):

Patrick C. McGeer ◽

Alexander Saldanha ◽

Robert K. Brayton ◽

Alberto L. Sangiovanni-Vincentelli

Keyword(s):

Timing Analysis ◽

Delay Models ◽

Exact Timing

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Network Optimization Using Don’t-Cares and Boolean Relations

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_4 ◽

1993 ◽

pp. 87-108

Author(s):

Kuang-Chien Chen ◽

Masahiro Fujita

Keyword(s):

Network Optimization ◽

Don't Cares

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Logic Synthesizers, The Transduction Method and Its Extension, Sylon

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_3 ◽

1993 ◽

pp. 59-86 ◽

Cited By ~ 2

Author(s):

Saburo Muroga

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Gate Sizing for Cell-Based Designs

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_16 ◽

1993 ◽

pp. 341-359

Author(s):

Wei-Po Lee ◽

Youn-Long Lin

Keyword(s):

Gate Sizing

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A Generation Method For Exor-Sum-of-Products Expressions Using Shared Binary Decision Diagrams

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_14 ◽

1993 ◽

pp. 313-322 ◽

Cited By ~ 2

Author(s):

Koichi Yasuoka

Keyword(s):

Binary Decision Diagrams ◽

Decision Diagrams ◽

Binary Decision ◽

Sum Of Products

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FPGA Design by Generalized Functional Decomposition

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization ◽

10.1007/978-1-4615-3154-8_11 ◽

1993 ◽

pp. 233-258 ◽

Cited By ~ 36

Author(s):

Tsutomu Sasao

Keyword(s):

Fpga Design ◽

Functional Decomposition

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The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and OptimizationLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer US

A New Algorithm for 0-1 Programming Based on Binary Decision Diagrams

A Partitioning Method for Area Optimization by Tree Analysis

A New Technology Mapping Method Based on Concurrent Factorization and Mapping

And-Exor Expressions and their Optimization

Delay Models and Exact Timing Analysis

Network Optimization Using Don’t-Cares and Boolean Relations

Logic Synthesizers, The Transduction Method and Its Extension, Sylon

Gate Sizing for Cell-Based Designs

A Generation Method For Exor-Sum-of-Products Expressions Using Shared Binary Decision Diagrams

FPGA Design by Generalized Functional Decomposition

The Kluwer International Series in Engineering and Computer Science - Logic Synthesis and Optimization
Latest Publications