Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
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Published By Springer New York

9781461408710, 9781461408727

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Introduction

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_1 ◽

2011 ◽

pp. 1-12

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

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Applying Verification Collaterals for Accurate Power Estimation

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_9 ◽

2011 ◽

pp. 105-118

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

Keyword(s):

Power Estimation

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Coprocessor Design Space Exploration Using High Level Synthesis

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_6 ◽

2011 ◽

pp. 71-80

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

High Level Synthesis ◽

High Level

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Statistical Regression Based Power Models

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_5 ◽

2011 ◽

pp. 59-70 ◽

Cited By ~ 2

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

Keyword(s):

Statistical Regression ◽

Power Models

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Regression-Based Dynamic Power Estimation for FPGAs

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_7 ◽

2011 ◽

pp. 81-92 ◽

Cited By ~ 1

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

Keyword(s):

Power Estimation ◽

Dynamic Power

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Background

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_3 ◽

2011 ◽

pp. 31-43

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

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Conclusions

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_13 ◽

2011 ◽

pp. 157-161

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

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High Level Simulation Directed RTL Power Estimation

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_8 ◽

2011 ◽

pp. 93-103

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

Keyword(s):

Power Estimation ◽

High Level

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Architectural Selection Using High Level Synthesis

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_4 ◽

2011 ◽

pp. 45-57

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

Keyword(s):

High Level Synthesis ◽

High Level

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Related Work

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis ◽

10.1007/978-1-4614-0872-7_2 ◽

2011 ◽

pp. 13-29

Author(s):

Sumit Ahuja ◽

Avinash Lakshminarayana ◽

Sandeep Kumar Shukla

Download Full-text

Low Power Design with High-Level Power Estimation and Power-Aware SynthesisLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer New York

Introduction

Applying Verification Collaterals for Accurate Power Estimation

Coprocessor Design Space Exploration Using High Level Synthesis

Statistical Regression Based Power Models

Regression-Based Dynamic Power Estimation for FPGAs

Background

Conclusions

High Level Simulation Directed RTL Power Estimation

Architectural Selection Using High Level Synthesis

Related Work

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis
Latest Publications