Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004.
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The state-of-art and future trends in testing embedded memories

Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. ◽

10.1109/mtdt.2004.1327984 ◽

2004 ◽

Cited By ~ 34

Author(s):

S. Hamdioui ◽

G. Gaydadjiev ◽

A.J. van de Goor

Keyword(s):

The State ◽

Future Trends ◽

Embedded Memories ◽

State Of Art

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SF-LRU cache replacement algorithm

Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. ◽

10.1109/mtdt.2004.1327979 ◽

2004 ◽

Cited By ~ 22

Author(s):

J. Alghazo ◽

A. Akaaboune ◽

N. Botros

Keyword(s):

Cache Replacement ◽

Replacement Algorithm

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An integrated memory self test and EDA solution

Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. ◽

10.1109/mtdt.2004.1327990 ◽

2004 ◽

Cited By ~ 1

Author(s):

R. Dean Adams ◽

R. Abbott ◽

Xiaoling Bai ◽

D. Burek ◽

E. MacDonald

Keyword(s):

Self Test

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Built-in self-test and repair (BISTR) techniques for embedded RAMs

Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. ◽

10.1109/mtdt.2004.1327985 ◽

2004 ◽

Cited By ~ 6

Author(s):

Shyue-Kung Lu ◽

Shih-Chang Huang

Keyword(s):

Self Test ◽

Built In Self Test

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Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. ◽

10.1109/mtdt.2004.1327975 ◽

2004 ◽

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Blank page

Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. ◽

10.1109/mtdt.2004.1327972 ◽

2004 ◽

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Do we need anything more than single bit error correction (ECC)?

Records of the 2004 International Workshop on Memory Technology, Design and Testing, 2004. ◽

10.1109/mtdt.2004.1327993 ◽

2004 ◽

Cited By ~ 31

Author(s):

M. Spica ◽

T.M. Mak

Keyword(s):

Error Correction

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