2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)
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9781424478118

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FPGA implementations of the Hummingbird cryptographic algorithm

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513116 ◽

2010 ◽

Cited By ~ 13

Author(s):

Xinxin Fan ◽

Guang Gong ◽

Ken Lauffenburger ◽

Troy Hicks

Keyword(s):

Cryptographic Algorithm

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Current flattening circuit for DPA countermeasure

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513104 ◽

2010 ◽

Cited By ~ 2

Author(s):

Ekarat Laohavaleeson ◽

Chintan Patel

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Hardware implementations of hash function Luffa

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513102 ◽

2010 ◽

Author(s):

Akashi Satoh ◽

Toshihiro Katashita ◽

Takeshi Sugawara ◽

Naofumi Homma ◽

Takafumi Aoki

Keyword(s):

Hash Function ◽

Hardware Implementations

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Side-channel attack resistant ROM-based AES S-Box

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513101 ◽

2010 ◽

Cited By ~ 6

Author(s):

Craig Teegarden ◽

Mudit Bhargava ◽

Ken Mai

Keyword(s):

Side Channel ◽

Side Channel Attack

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Provably secure obfuscation of diverse watermarks for sequential circuits

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513115 ◽

2010 ◽

Cited By ~ 16

Author(s):

Farinaz Koushanfar ◽

Yousra Alkabani

Keyword(s):

Sequential Circuits ◽

Provably Secure

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Low voltage fault attacks to AES

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513121 ◽

2010 ◽

Cited By ~ 21

Author(s):

Alessandro Barenghi ◽

Guido M. Bertoni ◽

Luca Breveglieri ◽

Mauro Pellicioli ◽

Gerardo Pelosi

Keyword(s):

Low Voltage ◽

Fault Attacks

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Multiplexing methods for power watermarking

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513118 ◽

2010 ◽

Cited By ~ 6

Author(s):

Daniel Ziener ◽

Florian Baueregger ◽

Jurgen Teich

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LISA: Maximizing RO PUF's secret extraction

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513105 ◽

2010 ◽

Cited By ~ 52

Author(s):

Chi-En Yin ◽

Gang Qu

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SLICED: Slide-based concurrent error detection technique for symmetric block ciphers

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513109 ◽

2010 ◽

Cited By ~ 14

Author(s):

Jeyavijayan Rajendran ◽

Hetal Borad ◽

Shyam Mantravadi ◽

Ramesh Karri

Keyword(s):

Error Detection ◽

Block Ciphers ◽

Detection Technique ◽

Concurrent Error Detection ◽

Symmetric Block

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Prototyping platform for performance evaluation of SHA-3 candidates

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) ◽

10.1109/hst.2010.5513111 ◽

2010 ◽

Cited By ~ 12

Author(s):

Kazuyuki Kobayashi ◽

Jun Ikegami ◽

Miroslav Knezevic ◽

Eric Xu Guo ◽

Shin'ichiro Matsuo ◽

...

Keyword(s):

Performance Evaluation

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2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

FPGA implementations of the Hummingbird cryptographic algorithm

Current flattening circuit for DPA countermeasure

Hardware implementations of hash function Luffa

Side-channel attack resistant ROM-based AES S-Box

Provably secure obfuscation of diverse watermarks for sequential circuits

Low voltage fault attacks to AES

Multiplexing methods for power watermarking

LISA: Maximizing RO PUF's secret extraction

SLICED: Slide-based concurrent error detection technique for symmetric block ciphers

Prototyping platform for performance evaluation of SHA-3 candidates

2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)
Latest Publications