2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
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9781509002597

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Enhanced low voltage digital & analog mixed-signal with 28nm FDSOI technology

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333503 ◽

2015 ◽

Author(s):

F. Arnaud

Keyword(s):

Low Voltage ◽

Mixed Signal

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Silicon-on-Ferroelectric-Insulator — A comparative analysis of the partially and fully depleted devices

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333514 ◽

2015 ◽

Author(s):

Azzedin D. Es-Sakhi ◽

Masud H Chowdhury

Keyword(s):

Comparative Analysis ◽

Fully Depleted

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Comparative study of parasitic elements on RF FoM in 28 nm FD SOI and bulk technologies

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333532 ◽

2015 ◽

Cited By ~ 4

Author(s):

B. Kazemi Esfeh ◽

V. Kilchytska ◽

N. Planes ◽

M. Haond ◽

D. Flandre ◽

...

Keyword(s):

Comparative Study ◽

28 Nm

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10nm Gate-length junctionless gate-all-around (JL-GAA) FETs based 8T SRAM design under process variation using a cross-layer simulation

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333552 ◽

2015 ◽

Cited By ~ 3

Author(s):

Luhao Wang ◽

Alireza Shafaei ◽

Shuang Chen ◽

Yanzhi Wang ◽

Shahin Nazarian ◽

...

Keyword(s):

Process Variation ◽

Cross Layer ◽

Gate Length ◽

Sram Design

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0.5-V 350-ps 28-nm FD-SOI SRAM array with dynamic power-supply 5T cell

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333549 ◽

2015 ◽

Author(s):

Khaja Ahmad Shaik ◽

Kiyoo Itoh ◽

Amara Amara

Keyword(s):

Power Supply ◽

Dynamic Power ◽

28 Nm

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Low power design: Ramping to production

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333548 ◽

2015 ◽

Author(s):

Christophe Chevallier

Keyword(s):

Low Power ◽

Low Power Design

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Analog performance improvement of self-cascode structures composed by UTBB transistors using back gate bias

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333512 ◽

2015 ◽

Cited By ~ 6

Author(s):

R. T. Doria ◽

R. Trevisoli ◽

M. de Souza ◽

M. A. Pavanello ◽

D. Flandre

Keyword(s):

Performance Improvement ◽

Gate Bias ◽

Back Gate ◽

Analog Performance ◽

Self Cascode

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Smart power technologies on SOI

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333480 ◽

2015 ◽

Cited By ~ 1

Author(s):

Piet Wessels

Keyword(s):

Smart Power

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Can we connect trillions of IoT sensors in a sustainable way? A technology/circuit perspective (Invited)

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333500 ◽

2015 ◽

Cited By ~ 10

Author(s):

David Bol ◽

Guerric de Streel ◽

Denis Flandre

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0.8-V rail-to-rail operational amplifier with near-Vt gain-boosting stage fabricated in FinFET technology for IoT sensor nodes

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2015.7333536 ◽

2015 ◽

Author(s):

Shin-ichi O'uchi ◽

Yongxun Liu ◽

Tadashi Nakagawa ◽

Wataru Mizubayashi ◽

Shinji Migita ◽

...

Keyword(s):

Operational Amplifier ◽

Sensor Nodes ◽

Rail To Rail

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2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Enhanced low voltage digital & analog mixed-signal with 28nm FDSOI technology

Silicon-on-Ferroelectric-Insulator — A comparative analysis of the partially and fully depleted devices

Comparative study of parasitic elements on RF FoM in 28 nm FD SOI and bulk technologies

10nm Gate-length junctionless gate-all-around (JL-GAA) FETs based 8T SRAM design under process variation using a cross-layer simulation

0.5-V 350-ps 28-nm FD-SOI SRAM array with dynamic power-supply 5T cell

Low power design: Ramping to production

Analog performance improvement of self-cascode structures composed by UTBB transistors using back gate bias

Smart power technologies on SOI

Can we connect trillions of IoT sensors in a sustainable way? A technology/circuit perspective (Invited)

0.8-V rail-to-rail operational amplifier with near-Vt gain-boosting stage fabricated in FinFET technology for IoT sensor nodes

2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
Latest Publications