Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.
Latest Publications

TOTAL DOCUMENTS

162

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

0780376595

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Register aware scheduling for distributed cache clustered architecture

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1194996 ◽

2003 ◽

Cited By ~ 1

Author(s):

Zhong Wang ◽

Xiaobo Sharon Hu ◽

E.H.-M. Sha

Keyword(s):

Distributed Cache

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Semi-formal test generation and resolving a temporal abstraction problem in practice: industrial application

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195111 ◽

2003 ◽

Author(s):

J. Dushina ◽

M. Benjamin ◽

D. Geist

Keyword(s):

Test Generation ◽

Industrial Application ◽

Temporal Abstraction ◽

Formal Test

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A frequency separation macromodel for system-level simulation of RF circuits

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195143 ◽

2003 ◽

Author(s):

Xin Li ◽

Peng Li ◽

Yang Xu ◽

R. Dimaggio ◽

L. Pileggi

Keyword(s):

Rf Circuits ◽

System Level ◽

Frequency Separation ◽

System Level Simulation

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Periodic steady-state analysis of coupled ODE-AE-CGE systems for MOS RF autonomous circuit simulation

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195142 ◽

2003 ◽

Author(s):

Xinyu Wu ◽

Zaiman Chen ◽

Jinmei Lai ◽

Qianling Zhang ◽

Omar Wing ◽

...

Keyword(s):

Steady State ◽

Circuit Simulation ◽

Steady State Analysis ◽

Periodic Steady State ◽

State Analysis

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Run-time energy estimation in system-on-a-chip designs

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195094 ◽

2003 ◽

Cited By ~ 2

Author(s):

J. Haid ◽

G. Kaefer ◽

Ch. Steger ◽

R. Weiss

Keyword(s):

Energy Estimation ◽

System On A Chip ◽

Run Time

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Design of a scalable RSA and ECC crypto-processor

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195066 ◽

2003 ◽

Author(s):

Ming-Cheng Sun ◽

Chih-Pin Su ◽

Chih-Tsun Huang ◽

Cheng-Wen Wu

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HyPE: hybrid power estimation for IP-based programmable systems

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195096 ◽

2003 ◽

Author(s):

Xun Liu ◽

M.C. Papaefthymiou

Keyword(s):

Power Estimation ◽

Hybrid Power

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5 Gbps serial link transmitter with pre-emphasis

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195127 ◽

2003 ◽

Author(s):

Chih-Hsien Lin ◽

Chung-Hong Wang ◽

Shyh-Jye Jou

Keyword(s):

Serial Link

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Routing-aware scan chain ordering

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195137 ◽

2003 ◽

Cited By ~ 6

Author(s):

P. Gupta ◽

A.B. Kahng ◽

S. Mantik

Keyword(s):

Scan Chain ◽

Chain Ordering

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A novel timing-driven global routing algorithm considering coupling effects for high performance circuit design

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195135 ◽

2003 ◽

Author(s):

Jingyu Xu ◽

Xianlong Hong ◽

Tong Jing ◽

Yici Cai ◽

Jun Gu

Keyword(s):

Circuit Design ◽

High Performance ◽

Routing Algorithm ◽

Global Routing ◽

Coupling Effects

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Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Register aware scheduling for distributed cache clustered architecture

Semi-formal test generation and resolving a temporal abstraction problem in practice: industrial application

A frequency separation macromodel for system-level simulation of RF circuits

Periodic steady-state analysis of coupled ODE-AE-CGE systems for MOS RF autonomous circuit simulation

Run-time energy estimation in system-on-a-chip designs

Design of a scalable RSA and ECC crypto-processor

HyPE: hybrid power estimation for IP-based programmable systems

5 Gbps serial link transmitter with pre-emphasis

Routing-aware scan chain ordering

A novel timing-driven global routing algorithm considering coupling effects for high performance circuit design

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.
Latest Publications