Test for Reliability for Mission Critical Applications

Test for Reliability is a test flow where an Integrated Circuit (IC) device is continuously stressed under several corner conditions that can be dynamically adapted based on the real-time observation of the critical signals of the device during the evolution of the test. We present our approach for a successful Test-for-Reliability flow, going beyond the objectives of the traditional reliability approach, and covering the entire process from design to failure analysis.

Design and Verification of UART using System Verilog

The main objective of this paper is to design and verify a full duplex UART module using System Verilog (SV). It is a serial communication protocol which provides communication between the systems without using clock signal. It converts parallel data into serial format and transmits the same. Once the data in serial format is received it is converted into parallel format. Designing of UART includes designing of baud rate generator, receiver, transmitter, interrupt and FIFO modules. Verification involves verifying the design by creating verification environment which allows to reuse the testbench and reduces the code complexity. Randomization is used to check the corner conditions which are hard to reach. 100% assertion and 100% functional coverage is achieved. UART operation is simulated using Questasim software.

Novel Prediction Framework for Path Delay Variation Based on Learning Method

Path delay variation becomes a serious concern in advanced technology, especially for multi-corner conditions. Plenty of timing analysis methods have been proposed to solve the issue of path delay variation, but they mainly focus on every single corner and are based on a characterized timing library, which neglects the correlation among multiple corners, resulting in a high characterization effort for all required corners. Here, a novel prediction framework is proposed for path delay variation by employing a learning-based method using back propagation (BP) regression. It can be used to solve the issue of path delay variation prediction under a single corner. Moreover, for multi-corner conditions, the proposed framework can be further expanded to predict corners that are not included in the training set. Experimental results show that the proposed model outperforms the traditional Advanced On-Chip Variation (AOCV) method with 1.4X improvement for the prediction of path delay variation for single corners. Additionally, while predicting new corners, the maximum error is 4.59%, which is less than current state-of-the-art works.

The Stationary Action Principle

This crucial chapter focuses on the stationary action principle. It introduces Lagrangian mechanics, using first-order variational calculus to derive the Euler–Lagrange equation, and the inverse problem is described. The chapter then considers the Ostrogradsky equation and discusses the properties of the extrema using the second-order variation to the action. It then discusses the difference between action functions (of Dirichlet boundary conditions) and action functionals of the extremal path. The different types of boundary conditions (Dirichlet vs Neumann) are elucidated. Topics discussed include Hessian conditions, Douglas’s theorem, the Jacobi last multiplier, Helmholtz conditions, Noether-type variation and Frenet–Serret frames, as well as concepts such as on shell and off shell. Actions of non-continuous extremals are examined using Weierstrass–Erdmann corner conditions, and the action principle is written in the most general form as the Hamilton–Suslov principle. Important applications of the Euler–Lagrange formulation are highlighted, including protein folding.