decoder complexity
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2019 ◽  
Vol 18 (5) ◽  
pp. 1149-1181
Author(s):  
Feliks Taubin ◽  
Andrey Trofimov

One of the approaches to organization of error correcting coding for multilevel flash memory is based on concatenated construction, in particular, on multidimensional lattices for inner coding. A characteristic feature of such structures is the dominance of the complexity of the outer decoder in the total decoder complexity. Therefore the concatenated construction with low-complexity outer decoder may be attractive since in practical applications the decoder complexity is the crucial limitation for the usage of the error correction coding. We consider a concatenated coding scheme for multilevel flash memory with the Barnes-Wall lattice based codes as an inner code and the Reed-Solomon code with correction up to 4…5 errors as an outer one. Performance analysis is fulfilled for a model characterizing the basic physical features of a flash memory cell with non-uniform target voltage levels and noise variance dependent on the recorded value (input-dependent additive Gaussian noise, ID-AGN). For this model we develop a modification of our approach for evaluation the error probability for the inner code. This modification uses the parallel structure of the inner code trellis which significantly reduces the computational complexity of the performance estimation. We present numerical examples of achievable recording density for the Reed-Solomon codes with correction up to four errors as the outer code for wide range of the retention time and number of write/read cycles.


2018 ◽  
Vol 7 (4.15) ◽  
pp. 301
Author(s):  
Amjad Ali Jassim ◽  
Wael A. Hadi. ◽  
Muhanned Ismael Ibrahim Al-Firas

Low-density parity checks (LDPC) codes are considered good performance error correction codes. However, decoder complexity increases with increasing code length. In this study, we introduce short-length serially concatenated LDPC codes. The proposed technique uses pairs of compatible LDPC codes that act as outer and inner serially concatenated codes. In this code pair, the inner code takes input that is the same length as the outer LDPC encoder output. This study examined two cases of LDPC codes as compatible pairs with low numbers of iterations and compared bit error rate (BER) performance to a standalone LDPC code with an additive white Gaussian noise channel. We also considered the quadrature phase shift keying QPSK, 16-quadrature amplitude modulation (QAM), and 64-QAM system modulation schemes. Simulation results demonstrate that the proposed system has good BER performance compared to a standalone LDPC code, the results summarized in table and performance curves.   


2016 ◽  
Vol 11 (3) ◽  
pp. 431-438
Author(s):  
Mehdi Semsarzadeh ◽  
Hoda Roodaki ◽  
Alireza Aminlou ◽  
Mahmoud Reza Hashemi ◽  
Shervin Shirmohammadi

2014 ◽  
Vol 25 (7) ◽  
pp. 1686-1703 ◽  
Author(s):  
Mehdi Semsarzadeh ◽  
Mahmoud Reza Hashemi ◽  
Shervin Shirmohammadi
Keyword(s):  

2014 ◽  
Vol 2014 ◽  
pp. 1-9 ◽  
Author(s):  
N. M. Masoodhu Banu ◽  
S. Sasikumar

A novel doping bits based belief propagation decoding algorithm, for rate-adaptive LDPC codes based on fixed bipartite graph code, is proposed. The proposed work modifies the decoding algorithm, by converting the puncturing nodes to regular source nodes and by following the encoding rule at the decoder. The transmitted doping bits in place of punctured bits, with the modified decoding algorithm at the decoder, feed all the punctured nodes with reliable log likelihood ratios. This enables the proposed decoding algorithm to recover all punctured nodes in the early iteration. The fast convergence leads to decoder complexity reduction while providing considerable improvement in performance.


2012 ◽  
Vol 239-240 ◽  
pp. 911-914
Author(s):  
Zhong Xun Wang ◽  
Shuang Shuang Yin

An improved codeword construction method was used to encode the BCH code and LDPC code in this paper according to the latest standard defined by digital video broadcasting standard(DVB), and moreover the data overflow problem was solved. The LDPC code was decoded by the reduced complexity Min-Sum decoding algorithm, in which the coefficient was studied. Fixed-point representation and decoder quantization were proposed and simulation results show that 6-bits and 16-bits uniform quantization can make close to the performance of unquantized decoder, which reduces the decoder complexity for hardware implementation.


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