An Improved FFIP Method Based on Mathematical Logic and SysML

In recent years, the model-based safety analysis (MBSA) has been developing continuously. The Functional Failure Identification and Propagation (FFIP) method is a graphics processing technology which supports the analysis of fault propagation paths before making costly design commitments. However, the traditional FFIP has some deficiencies. In this paper, we extend the functional failure logic (FFL) in the FFIP and introduce the concept of deviation. So, FFIP can be used to analyze the failure process of the systems and make the logical analysis of functional failure easier. Based on the extended FFL, we present a new overview of the FFIP. The FFIP is improved by using mathematical logic and Systems Modeling Language (SysML). The standard expression of FFL is realized, which is conducive to the subsequent modeling and modification. Additionally, we use the failure logic analysis in the FFIP to improve the state machine diagram (SMD) in SysML. Finally, the improved FFIP method is used to analyze the fault propagation paths of the system and Simulink is used for simulation. The fault tree is generated according to the simulation results, the minimum cut set is calculated, and the key failure parts of the system are obtained.

Multiclock Constraint System Modelling and Verification for Ensuring Cooperative Autonomous Driving Safety

CADS (cooperative autonomous driving systems) are software-intensive and safety-critical reactive systems and give great promise to our daily life, but system errors may not be identified in the design stage until the implement stage, and the cost to correct them will be more expensive later than the early stage. For designing trustworthy autonomous software systems, we have to deal with multiclock constraint models. SysML (System Modeling Language) meets increasing adoption in order to carry out system-level modelling and verification against abstract representations, but it suffers from semantic ambiguities in the design of safety-critical autonomous systems. The main objective is to investigate methods for coping with the design and analysis models simultaneously and to achieve semantic consistency based on mathematical foundations and formal model transformation. In this paper, we propose a method to combine the requirement modelling process with analysis process together for CADS safety and reliability guarantee. Firstly, we extend SysML metamodels and construct SysML profile for the CADS domain that could improve modelling correctness and enhance reusability. An instantiated CADS model has been designed by means of adopting a profile containing different key functional and nonfunctional attributes and behaviors. Secondly, we define formal syntax and semantic notations for modelling elements in the SysML state machine diagram and show transformation rules between the state machine diagram and the CCSL (Clock Constraint Specification Language) model. Semantic preservation is also proved using the bisimulation relation between them for rigorous mapping correctness. Thirdly, a cooperative autonomous overtaking driving case study on the highway scenario is used for illustration, and we use the tool TimeSquare to simulate CCSL specification execution traces at the system design stage.

TEST CASE GENERATION BERBASIS STATE MODEL UNTUK VERIFIKASI SISTEM LAYANAN PERMOHONAN ROHANIWAN

Pembuatan kasus uji (<em>test case generation</em>) merupakan tahapan yang membutuhkan sumber daya terbesar yang memiliki pengaruh terhadap keefektifan dan efisiensi suatu pengujian perangkat lunak. Pembuatan <em>test case</em> menjadi salah satu topik penelitian paling manarik. Pengujian berbasis model (<em>model based testing</em>) diusulkan untuk membuat kasus uji pada Sistem Layanan Permohonan Rohaniwan Kementerian Agama Provinsi Jawa Tengah. Model yang diusulkan dalam pembuatan kasus uji dimulai dari kegiatan pengumpulan kebutuhan, menganalisa <em>use case</em> dan <em>class</em>, mengidentifikasi <em>state</em>, melakukan pemodelan perilaku (<em>behaviour modelling</em>) menggunakan<em> state machine diagram</em> dan membuat daftar kasus uji. Penelitian menunjukkan penggunaan model berbasis <em>state</em> mempu mendukung pembuatan kasus uji (<em>test case</em>) dan dapat mendeteksi perilaku (<em>behavior</em>) dari <em>response</em> sistem yang kurang sesuai terhadap inputan atau aksi yang diberikan oleh <em>user.</em>

Design of Test Pattern Generator for Testing Crosstalk Faults in TSVs

Design of Test pattern generator to test crosstalk faults in Through Silicon Vias (TSV) in three dimensional integrated circuits presented in this paper. A well-known test pattern generation model for testing crosstalk called as Maximum aggressor fault model is adopted in the design. The finite state machine diagram for design of TPG presented in reference [1] is modified and the complete design of TPG is discussed in this paper. Verilog HDL Simulation and synthesis results of the proposed Test pattern generator is discussed.

FIRO: PURWARUPA ROBOT PENYELAMAT DAN PEMADAM API BERBASIS MIKROKONTROLER ARDUINO

Penelitian ini bertujuan untuk merancang dan mengimplementasikan (1) rangkaian mekanik dan (2) sistem pergerakan serta (3) mengukur rata-rata waktu dalam pemadaman api dan penyelamatan purwarupa robot penyelamat dan pemadam api berbasis mikrokontroler Arduino. Jenis penelitian yang digunakan dalam penelitian ini adalah Penelitian dan Pengembangan (R & D) dengan model ADDIE (Analysis, Design, Development, Implementation, Evaluation). Hasil penelitian yang diperoleh terlihat bahwa (1) rangkaian mekanik robot terdapat 3 lantai. Lantai pertama 1 terdapat beberapa perangkat keras yang meliputi: dua buah omni wheel, dua motor DC, baterai lipo,dua driver motor DC dan dua roda pada motor. Lantai kedua terdapat beberapa perangkat keras yang meliputi: tiga sensor ping, sensor kamera, tiga supply daya, dan dua mikrokontroler. Lantai ketiga terdapat beberapa perangkat keras yang meliputi: motor DC penggerak kipas, lengan robot, IR flame, sensor UVTron, pegangan robot,tombol kalibrasi sound activation, sound activation dan driver motor untuk motor penggerak kipas. (2) Sistem pergerakan robot menggunakan telusur kanan untuk menelusuri dinding. Pada state machine diagram terdapat 5 proses atau keadaan dalam pergerakan robot diantaranya : maju, mundur serong kanan, mundur serong kiri belok kanan dan spin kiri. Proses atau keadaan tersebut dipengaruhi oleh input dari nilai sensor ping. Dalam menyelesaikan misi penyelamatan dan pemadaman api robot memiliki 8 proses atau keadaan diantaranya : maju, mundur serong kanan, mundur serong kiri, spin kanan, spin kiri, angkat keranjang boneka, memadamkan api dan berhenti. (3) Rata-rata waktu dalam pemadaman api robot dari 5 kali percobaan adalah 2,56 menit. Rata-rata waktu penyelamatan robotdari 5 kali percobaan adalah 2,01 menit.