Redundant Computing Resources Management of Integrated Modular Avionics

In article the structure and the control algorithm are considered by diverse redundancy of the computing system of the perspective integrated modular avionics. Computing resources of the integrated modular avionics system are generally represented by heterogeneous computing systems used for information processing as part of the onboard integrated computing environment. The basis of heterogeneous computing systems are processor nodes, redundancy of computing systems is that the number of processor nodes is greater than one. The task is to synthesize such a computer system in which the automatic control of redundant computational resources would be carried out by using the own capabilities of the processor nodes and without the use of additional hardware resources. It is considered that the redundant computer system performs meaningful calculations of the problem solved by several processor nodes in parallel. All meaningful calculations for any signs initially divided into relatively short stages, providing an opportunity to assess the effectiveness of the completion of each of them. The computational system redundancy management is based on the periodic calculation and comparison of the success indicators of the stage. Pairwise arbitration of processor nodes is carried out according to a hierarchical scheme by comparing the values of the success indicators of the stages of the same name. Subsequent reconfiguration of the computer system allocates passive and leading processor nodes in pairs at all levels of the hierarchical scheme. The failure of the passive processor node does not affect the execution of the main cycle. The failure of the host processor node does not cause interruptions in the output of the results of calculations, but destroys the structure of reserves, which is restored after arbitration in the next cycle. Failure of the lead CPU top node leads to the failure output in the current cycle, the computational process is restored along with the new hierarchy of the computing system in the next cycle. The proposed solution is aimed at parrying both hardware failures and software malfunction. The methodical example based on the computer system of the modern onboard equipment complex of the transports category aircraft is resulted.

Parallel Artificial Bee Colony Algorithm for the Traveling Salesman Problem

Artificial Bee Colony Algorithm (ABCA) is a novel swarm intelligence algorithm which a colony of artificial bees cooperate in finding good solutions for numerical optimization problems and combinatorial optimization problems. Traveling Salesman Problem (TSP) is a famous combinatorial optimization problem which has been used in many fields such as network communication, transportation, manufacturing and logistics. However, it requires a considerably large amount of computational time and resources for solving TSP. To dealing with this problem, we present a Parallel Artificial Bee Colony Algorithm (PABCA) in several computers which operation system is Linux based on the Message Passing Interface (MPI). The entire artificial bee colony is divided into several subgroups by PABCA equally. Each subgroup performs an ABCA for TSP on each processor node, respectively. Each sub-colony on every processor node communicates the current best fitness function and parameters of current best fitness function according to ring topological structure during calculation process. Some well-known benchmark problems in TSP are used to evaluate the performance of ABCA and PABCA. Meanwhile, the performance of PABCA is compared with Genetic Algorithm (GA) and Particle Swarm Optimization (PSO). Experimental results show that the PABCA can obtain solutions with equal precision and reduce the time of computation obviously in comparison with serial ABCA. And PABCA have much better performance in contrast with GA and PSO.

Routing in Coloured Sparse Optical Tori by Using Balanced WDM and Network Sparseness

The authors present a WDM (Wavelength-Division Multiplexing) based all-optical network architecture, and study scheduled routing on it. Their architecture can be seen as a communication system of parallel multi-core computer or a large-scale high bandwidth routing switch of e.g., telecommunication network. The goal is to construct such a scalable architecture and a supporting routing protocol for it so that no electro-optical conversions are needed on the routing paths, all packets are routed along one of the shortest paths, processor nodes can inject packets constantly into the network, and all the packets injected into the routing machinery reach their targets without collisions. The authors’ CSOT is a sparse network. A large fraction of the nodes are intermediate nodes instead of processor nodes. Only the processor nodes are sources and sinks of packets. The number of all nodes is and is the number of processor nodes in our construction. For scheduled routing to work, the authors consider routing problems as a set of h-relations. They achieved work-optimal routing of -relations for a reasonable size of . The efficiency of routing is based on routing latency hiding which is made possible by WDM and sparseness based increase bandwidth per processor node.