Xilinx Based Electronic Voting Machine

Conventional paper based voting procedure was terribly long process and extremely prone to errors. Polling by Electronic Voting Machine (EVM) is easy, safe and secure methodology that takes minimum of our time .In order to perform this mechanism, there were several phases in the design process such as designing a flow chart, algorithm and simultaneously the code is developed to implement & stimulate the logic. The proposed digital EVM was designed on Xilinx ISE using verilog HDL and can also be implemented on FPGA board for real time purpose. The proposed method consists of 3 stages, in the first stage we decide the total no. of voters and the total number of contestants taking part in the election process .we have assigned Voting enable which is active high input signal for the voter in order to cast his vote by using voter switch input signal for making this election process more secure and safe. In stage two, voting process begins when the voter casts his vote to a particular party or contestants the polled vote is registered in the individual contestant registry. In stage three after completion of voting process the votes are validated by comparing the votes polled to the contestants in their registries after which the election process ends by declaring the winner. The above proposed method can be implemented on FPGA board for real time applications ranging from university level elections to Assembly and LokSabha elections, as it has the advantage that it can be reprogrammed over and over for various tasks according to their requirement which helps in reducing the expenditure.

Efficient Design and Fpga Implementation of Microarchitecture for Network-On-Chip Routers

Proceedings with advances in semiconductor innovation, combined with an expanding worry for vitality effectiveness, have prompted an industry-wide move in center towards particular structures that influence parallelism so as to meet execution objectives. Network on-Chip (NoCs) are generally viewed as a promising methodology for tending to the correspondence issues related to chip multi-processors for future applications, even with further increments in incorporation thickness. In the present work, is research the usage perspectives and configuration exchange offs with regards to switches for NoC solicitations. Specifically, our emphasis is on creating effective control rationale for superior switch usage. Utilizing parameterized RTL usage, the main assess delegate Virtual Channel (VC) and switch allocator designs as far as coordinating quality, postponement, zone and power. The proposed work is additionally researched the affectability of these properties to key system parameters, just as the effect of distribution on by and large system execution. In light of the consequences of this examination, the propose microarchitectural changes that improve postponement, region and vitality effectiveness: Sparse VC designation diminishes the multifaceted nature of VC allocators by abusing confinements on advances between bundle classes. Two improved plans for theoretical switch assignment improve deferral and cost while keeping up the basic inactivity upgrades at low to medium burden; this is accomplished by bringing about a negligible misfortune in throughput close to the immersion point. It additionally explore a commonsense execution of joined VC and switch distribution and its effect on system cost and execution. The second piece of the proposed work centers on switch input cradle the executives. Investigate the plan exchange offs engaged with picking a cushion association, and we assess reasonable static and dynamic cradle the executives plans and their effect on system execution and cost. These works moreover demonstrate that cushion sharing can prompt extreme execution corruption within the sight of clog. An epic plan that improves the use of powerfully overseen switch input cushions by shifting the firmness of the stream control criticism circle dependent on downstream clog. By hindering inefficient cushion inhabitance, this mitigates undesired obstruction impacts between remaining tasks at hand with varying execution attributes. Finally the 4x4 NoC design is shown the better results in terms of Area, delay, speed, latency and throughput as compared to counterpart work.

Pembelajaran Microcontroller MCS-51 Dengan Metodologi Interaktif

Evaluation Board Microcontroller 89S51 / 89S82 / 89S53 (PEM-51) is a tool used to support microcontroller subject learning with an interactive methodology. PEM-51 consists of input / output modules that are integrated in one PCB board. The modules consist of a switch input, keypad module, LED module, seven segment display module, LCD display module, ADC (Analog to Digital Converter) module, DAC (Digital to Analog Conver) module, Stepper motor module. The software used in this tool is C using the Keil µVision4 compiler. The interactive learning process can be done by making a simulation circuit using Proteus software before implementing it to a microcontroller. With PEM-51, it is expected to increase student competency in studying Microcontroller courses.

Pembelajaran Microcontroller MCS-51 Dengan Metodologi Interaktif

Evaluation Board Microcontroller 89S51 / 89S82 / 89S53 (PEM-51) is a tool used to support microcontroller subject learning with an interactive methodology. PEM-51 consists of input / output modules that are integrated in one PCB board. The modules consist of a switch input, keypad module, LED module, seven segment display module, LCD display module, ADC (Analog to Digital Converter) module, DAC (Digital to Analog Conver) module, Stepper motor module. The software used in this tool is C using the Keil µVision4 compiler. The interactive learning process can be done by making a simulation circuit using Proteus software before implementing it to a microcontroller. With PEM-51, it is expected to increase student competency in studying Microcontroller courses.

Software Anti-Interference Design of SCM Control System

SCM control system requires high reliability and security, the entire control system to operate safely and reliably only when a strong anti-interference capability. In switch input and output, the use of the instruction redundancy methods to achieve the switch signal input and output filtering; in data collection, based on the hardware anti-interference taken arithmetic average filtering method, in order to strengthen its anti-jamming capability. In the system status monitoring, watchdog feature is enabled with the MSP430F449 microcontroller, when the watchdog timer overflows, the system automatically reset, the experiment proved that this method can save hardware resources, flexible design, low cost, single-chip control, it can guarantee the smooth operation of the system.

Application of Distributed Measurement and Control System

Measurement and control system plays a gatekeeper and director role in industrial production. It obtains various parameters from the production site, in order to meet the needs of production, improve quality, ensure safety in production. Distributed measurement and control systems scalability, inexpensive cost and other factors have been widely used. This paper mainly discusses a distributed measurement and control system which based on STC89C52 MCU, RS485 bus, 18B20 temperature components and ADS7822 voltage acquisition components with a main control terminal and three nodes, through RS485 communications. The main control terminal has keyboard and LCD1602 displayer, which can read each node state. Each node refers to one of the measurement and control items below (temperature measurement, current or voltage measurement, switch input measurement and switch output control).