finite projective geometry
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2014 ◽  
Vol 06 (01) ◽  
pp. 1450004
Author(s):  
SWADESH CHOUDHARY ◽  
HRISHIKESH SHARMA ◽  
SACHIN PATKAR

A number of computations exist, especially in area of error-control coding and matrix computations, whose underlying data flow graphs are based on finite projective-geometry (PG) based balanced bipartite graphs. Many of these applications of finite projective geometry are actively being researched upon, especially in coding theory. Almost all these applications need large bipartite graphs, whose nodes represent parallel computations. To reduce its implementation cost, reducing amount of system/hardware resources during design is an important engineering objective. In this context, we present a scheme to reduce resource utilization while designing systems modeled using PG-based graphs. In such systems, the number of processing units is equal to the number of vertices, each performing an atomic computation. We present a novel way of partitioning the vertex set assigned to various atomic computations, into blocks. Each block of partition is then assigned to a processing unit. A processing unit performs the computations corresponding to the vertices in the block assigned to it in a sequential fashion, thus creating the effect of folding the overall computation. The symmetric properties of projective space lattices enable us to develop a conflict-free communication schedule. We employed the technique of coset decomposition of a finite field for partitioning. The folding scheme achieves the best possible throughput, in lack of any overhead of shuffling data across memories while scheduling another computation on the same processing unit. We first provide a scheme for a finite projective space of dimension five, and the corresponding schedules. This specific scheme is then generalized for arbitrary finite projective spaces. Both the folding schemes have been verified by both simulation as well as hardware prototyping. For example, a semi-parallel decoder architecture for a new class of expander codes was designed and implemented using this scheme, with potential deployment in DVD-R/CD-ROM drives.


2013 ◽  
Vol 05 (04) ◽  
pp. 1350036
Author(s):  
SWADESH CHOUDHARY ◽  
HRISHIKESH SHARMA ◽  
SACHIN PATKAR

A number of computations exist, especially in area of error-control coding and matrix computations, whose underlying data flow graphs are based on finite projective-geometry (PG)-based balanced bipartite graphs. Many of these applications of finite projective geometry are actively being researched upon, especially in coding theory. Almost all these applications need large bipartite graphs, whose nodes represent parallel computations. To reduce its implementation cost, reducing amount of system/hardware resources during design is an important engineering objective. In this context, we present a scheme to reduce resource utilization while designing systems modeled using PG-based graphs. In such systems, the number of processing units is equal to the number of vertices, each performing an atomic computation. We present a novel way of partitioning the vertex set assigned to various atomic computations, into blocks. Each block of partition is then assigned to a processing unit. A processing unit performs the computations corresponding to the vertices in the block assigned to it in a sequential fashion, thus creating the effect of folding the overall computation. The symmetric properties of projective space lattices enable us to develop a conflict-free communication schedule. We employed the technique of coset decomposition of a finite field for partitioning. The folding scheme achieves the best possible throughput, in lack of any overhead of shuffling data across memories while scheduling another computation on the same processing unit. We first provide a scheme for a finite projective space of dimension five, and the corresponding schedules. This specific scheme is then generalized for arbitrary finite projective spaces. Both the folding schemes have been verified by both simulation as well as hardware prototyping. For example, a semi-parallel decoder architecture for a new class of expander codes was designed and implemented using this scheme, with potential deployment in DVD-R/CD-ROM drives.


2008 ◽  
Vol 37 (8) ◽  
pp. 1258-1265
Author(s):  
M. L. Aggarwal ◽  
Lih-Yuan Deng ◽  
Mukta Datta Mazumder

2008 ◽  
Vol 64 (1) ◽  
pp. 26-33 ◽  
Author(s):  
V. S. Kraposhin ◽  
A. L. Talis ◽  
V. G. Kosushkin ◽  
A. A. Ogneva ◽  
L. I. Zinober

Tessellations by generating clusters are proposed for the high-pressure phases BC8 and R8 of silicon. The structures of both high-pressure phases are represented by the parallel packings of rods. The latter are stacks of distorted icosahedra, joined by a common triangular face and flattened out along the threefold symmetry axis. Along the rod axis there is an alternation of empty and double-centered icosahedra. The empty icosahedra are additionally distorted in the cubic BC8 phase by antiparallel rotation about the rod axis, while the double-centered icosahedra are distorted by that rotation in the rhombohedral R8 phase. A possible mechanism of the reversible BC8 ↔ R8 transformation is proposed as the rotation about the rod axis of the common triangular face of the neighboring icosahedra, thus transforming between distorted and undistorted icosahedra. The graphs of the generating clusters for both the BC8 and R8 structures are determined by two subconfigurations of the same construction of the finite projective geometry.


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