Asymmetry-Induced Dynamics for a Class of Diode-Based Chaotic Circuits: A Case Study

We consider the modeling and asymmetry-induced dynamics for a class of chaotic circuits sharing the same feature of an antiparallel diodes pair as the nonlinear component. The simple autonomous jerk circuit of [J. Kengne, Z. T. Njitacke, A. N. Nguomkam, M. T. Fouodji and H. B. Fotsin, Coexistence of multiple attractors and crisis route to chaos in a novel chaotic jerk circuit, Int. J. Bifurcation Chaos Appl. Sci. Eng.26 (2016) 1650081] is used as the prototype. In contrast to current approaches where the diodes are assumed to be identical (and thus a perfect symmetric circuit), we examine the more realistic situation where the diodes have different electrical properties in spite of unavoidable scattering of parameters. In this case, the nonlinear component formed by the diodes pair displays an asymmetric current–voltage characteristic which induces asymmetry of the whole circuit. The model is described by a continuous-time 3D autonomous system (ODEs) with exponential nonlinearities. We examine the chaos mechanism with respect to system parameters both in the symmetric and asymmetric modes of operation by using bifurcation diagrams and phase space trajectory plots as the main indicators. Period doubling route to chaos, merging crisis, and multiple coexisting (i.e., two, four, or six) mutually symmetric attractors are reported in the symmetric mode of oscillation. In the asymmetric mode, several unusual nonlinear behaviors arise such as coexisting bifurcations, hysteresis, asymmetric double-band chaotic attractor, crisis, and coexisting multiple (i.e., two, three, four, or five) asymmetric attractors for some suitable ranges of parameters. Theoretical analyses and circuit experiments show a very good agreement. The results obtained in this work let us conjecture that chaotic circuits with antiparallel diodes pair are capable of much more complex dynamics than what is reported in the current literature and thus should be reconsidered accordingly in spite of the approach followed in this work.

A five-level multilevel topology utilizing multicarrier modulation technique

<p>This paper presents a new topology for cascaded H-bridge multilevel inverter utilizing multicarrier modulation technique. The new five-level topology utilizes a capacitive divider network consisting of two capacitors for producing output voltage levels. The developed circuit has reduced number of switches and dc sources compared to conventional five level inverters. Five main power switches, a single additional diode apart from antiparallel diodes, two capacitors and a dc supply constitute a single five level unit. Simulations as well as experimental results are verified for the new topology utilising multicarrier modulation technique with reduced harmonic distortions in the output.</p>