Informational-theoretical approach to the evaluation of supercomputers

Предложен теоретико-информационный подход к оценке производительности суперкомпьютеров. Этот подход основан на характеристике “вычислительная способность”, которую можно определить теоретически, опираясь исключительно на описание архитектуры исследуемой системы. Предложен метод определения вычислительной способности суперкомпьютеров с учетом влияния межпроцессорного взаимодействия. Метод применяется в работе для оценки производительности пяти суперкомпьютеров среди первых 50 позиций в списке TOP500 (ноябрь 2016). Полученные результаты сравниваются с аналогичными значениями бенчмарка LINPACK и характеристиками Theoretical peak, используемыми для формирования рейтинга TOP500. По результатам сравнения делаются выводы относительно применимости указанного подхода для оценки производительности суперкомпьютеров на этапе разработки. In this paper we present the informational-theoretical approach to the evaluation of performance for supercomputers. This approach is based on the computer capacity characteristic which can be estimated theoretically (without any experiments over the working model of the investigated computer) relying on the description of the architecture of the system under study. We describe the method for estimation of the supercomputers Computer capacity which takes into account the influence of the interprocess communication. The described method is used in this paper to estimate the performance of the five supercomputers among the first fifty positions in TOP500 list (according to November 2016 data). The obtained results are compared with the values of LINPACK benchmark and Theoretical peak characteristic which are used to form the TOP500 rating. Based on the comparison we draw conclusions about the applicability of the presented approach to the evaluation of supercomputers performance at the design stage.

Research of Register Pressure Aware Loop Unrolling Optimizations for Compiler

Register pressure problem has been a known problem for compiler because of the mismatch between the infinite number of pseudo registers and the finite number of hard registers. Too heavy register pressure may results in register spilling and then leads to performance degradation. There are a lot of optimizations, especially loop optimizations suffer from register spilling in compiler. In order to fight register pressure and therefore improve the effectiveness of compiler, this research takes the register pressure into account to improve loop unrolling optimization during the transformation process. In addition, a register pressure aware transformation is able to reduce the performance overhead of some fine-grained randomization transformations which can be used to defend against ROP attacks. Experiments showed a peak improvement of about 3.6% and an average improvement of about 1% for SPEC CPU 2006 benchmarks and a peak improvement of about 3% and an average improvement of about 1% for the LINPACK benchmark.

Theoretical Approach to Performance Evaluation of Supercomputers

In this paper, we extend an information-theoretic approach of computer performance evaluation to supercomputers. This approach is based on the notion of computer Capacity which can be estimated relying solely on the description of computer architecture. We describe the method of calculating Computer Capacity for supercomputers including the influence of the architecture of communication network. The suggested approach is applied to estimate the performance of three of the top 10 supercomputers (according to TOP500 June-2016 list) which are based on Haswell processors. For greater objectivity of results, we compared them relatively to values of another supercomputer which is based an Ivy Bridge processors (this microarchitecture differs from Haswell). The obtained results are compared with values of TOP500 LINPACK benchmark and theoretical peak and we arrive at conclusions about the applicability of the presented theoretical approach (nonexperimental) for performance evaluation of real supercomputers. In particular, it means that the estimations of the computer capacity can be used at the design stage of the development of supercomputers.