60 GHz Double Deck T-Gate AlN/GaN/AlGaN HEMT for V-Band Satellites

The influence of double deck T-gate on LG=0.2 μm AlN/GaN/AlGaN HEMT is analysed in this paper. The T-gate supported with Silicon Nitride provides a tremendous mechanical reliability. It drops off the crest electric-field at gate edges and postponing the breakdown voltage of a device. A 0.2-μm double deck T-gate HEMT on Silicon Carbide substrate offer fMAX of 107 Giga Hertz, fT of 60 Giga Hertz and the breakdown voltage of 136 Volts. Furthermore, it produces the maximum-transconductance and drain-current of 0.187 Siemens/mm and 0.41 Ampere/mm respectively. In addition, the lateral electric-field noticed at gate-edge shows 2.1×106 Volts/cm. Besides, the double deck T-gate AlN/GaN HEMT achieves a 45 % increment in breakdown voltage compared to traditional GaN-HEMT device. Moreover, it reveals a remarkable Johnson figure-of-merit of 7.9 Tera Hertz Volt. Therefore, the double deck T-gate on AlN/GaN/AlGaN HEMT is the superlative device for 60 GHz V-band satellite application.

Dissipationless zero energy epigraphene edge state for nanoelectronics

The graphene edge state is essential for graphene electronics and fundamental in graphene theory, however it is not observed in deposited graphene. Here we report the discovery of the epigraphene edge state (EGES) in conventionally patterned epigraphene using plasma-based lithography that stabilizes and passivates the edges probably by fusing the graphene edges to the non-polar silicon carbide substrate, as expected. Transport involves a single, essentially dissipationless conductance channel at zero energy up to room temperature. The Fermi level is pinned at zero energy. The EGES does not generate a Hall voltage and the usual quantum Hall effect is observed only after subtraction of the EGES current. EGES transport is highly protected and apparently mediated by an unconventional zero-energy fermion that is half electron and half hole. Interconnected networks involving only the EGES can be patterned, opening the door to a new graphene nanoelectronics paradigm that is relevant for quantum computing.

Morphology Evolution of Nanoscale-Thick Au/Pd Bimetallic Films on Silicon Carbide Substrate

Bimetallic Au/Pd nanoscale-thick films were sputter-deposited at room temperature on a silicon carbide (SiC) surface, and the surface-morphology evolution of the films versus thickness was studied with scanning electron microscopy. This study allowed to elucidate the Au/Pd growth mechanism by identifying characteristic growth regimes, and to quantify the characteristic parameters of the growth process. In particular, we observed that the Au/Pd film initially grew as three-dimensional clusters; then, increasing Au/Pd film thickness, film morphology evolved from isolated clusters to partially coalesced wormlike structures, followed by percolation morphology, and, finally, into a continuous rough film. The application of the interrupted coalescence model allowed us to evaluate a critical mean cluster diameter for partial coalescence, and the application of Vincent’s model allowed us to quantify the critical Au/Pd coverage for percolation transition.