building block layout Latest Research Papers

Parallel Genetic Algorithm for VLSI Building Block Layout

2006 International Conference on Wireless Communications, Networking and Mobile Computing ◽

10.1109/wicom.2006.170 ◽

2006 ◽

Author(s):

Ning Xu ◽

Feng Huang ◽

Zhonghua Jiang

Keyword(s):

Genetic Algorithm ◽

Building Block ◽

Parallel Genetic Algorithm ◽

Building Block Layout

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An Incremental Placement Algorithm for Building Block Layout Design Based on the O-Tree Representation

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1093/ietfec/e88-a.12.3398 ◽

2005 ◽

Vol E88-A (12) ◽

pp. 3398-3404 ◽

Cited By ~ 1

Author(s):

J. LI

Keyword(s):

Building Block ◽

Layout Design ◽

Tree Representation ◽

Incremental Placement ◽

Placement Algorithm ◽

Building Block Layout

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An incremental placement algorithm for building block layout design based on the O/spl I.bar/tree non-slicing representation

2004 International Conference on Communications, Circuits and Systems (IEEE Cat. No.04EX914) ◽

10.1109/icccas.2004.1346400 ◽

2004 ◽

Author(s):

Jing Li ◽

Juebang Yu ◽

H. Miyashita

Keyword(s):

Building Block ◽

Layout Design ◽

Incremental Placement ◽

Placement Algorithm ◽

Building Block Layout

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Building block layout by parallel simulated annealing algorithms

2004 International Conference on Communications, Circuits and Systems (IEEE Cat. No.04EX914) ◽

10.1109/icccas.2004.1346403 ◽

2004 ◽

Author(s):

Qinglang Luo ◽

Xianlong Hong ◽

Sheqin Dong ◽

Qiang Zhou

Keyword(s):

Simulated Annealing ◽

Building Block ◽

Parallel Simulated Annealing ◽

Building Block Layout ◽

Annealing Algorithms

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Step by step placement strategies for building block layout

10.1109/iscas.1989.100502 ◽

2003 ◽

Cited By ~ 4

Author(s):

H. Onodera ◽

M. Sakamoto ◽

T. Kurihara ◽

K. Tamaru

Keyword(s):

Building Block ◽

Building Block Layout

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Global refinement for building block layout

1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers ◽

10.1109/iccad.1989.76911 ◽

2003 ◽

Author(s):

Yin-Meng Li ◽

Pu-Shan Tang

Keyword(s):

Building Block ◽

Building Block Layout

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Channel routing order for building-block layout with rectilinear modules

[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers ◽

10.1109/iccad.1988.122490 ◽

2003 ◽

Cited By ~ 10

Author(s):

M. Guruswamy ◽

D.F. Wong

Keyword(s):

Building Block ◽

Channel Routing ◽

Building Block Layout

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Connectivity biased channel construction and ordering for building-block layout

25th ACM/IEEE, Design Automation Conference.Proceedings 1988. ◽

10.1109/dac.1988.14816 ◽

2003 ◽

Cited By ~ 12

Author(s):

H. Cai

Keyword(s):

Building Block ◽

Building Block Layout

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An optimal channel pin assignment with multiple intervals for building block layout

Proceedings EURO-DAC '92: European Design Automation Conference ◽

10.1109/eurdac.1992.246220 ◽

2003 ◽

Cited By ~ 5

Author(s):

T. Koide ◽

S. Wakabayashi ◽

N. Yoshida

Keyword(s):

Building Block ◽

Building Block Layout

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An integrated approach to pin assignment and global routing for VLSI building-block layout

1993 European Conference on Design Automation with the European Event in ASIC Design ◽

10.1109/edac.1993.386506 ◽

2002 ◽

Cited By ~ 9

Author(s):

T. Koide ◽

S. Wakabayashi ◽

N. Yoshida

Keyword(s):

Building Block ◽

Integrated Approach ◽

Global Routing ◽

Building Block Layout

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building block layout
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

Parallel Genetic Algorithm for VLSI Building Block Layout

An Incremental Placement Algorithm for Building Block Layout Design Based on the O-Tree Representation

An incremental placement algorithm for building block layout design based on the O/spl I.bar/tree non-slicing representation

Building block layout by parallel simulated annealing algorithms

Step by step placement strategies for building block layout

Global refinement for building block layout

Channel routing order for building-block layout with rectilinear modules

Connectivity biased channel construction and ordering for building-block layout

An optimal channel pin assignment with multiple intervals for building block layout

An integrated approach to pin assignment and global routing for VLSI building-block layout

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building block layoutRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Parallel Genetic Algorithm for VLSI Building Block Layout

An Incremental Placement Algorithm for Building Block Layout Design Based on the O-Tree Representation

An incremental placement algorithm for building block layout design based on the O/spl I.bar/tree non-slicing representation

Building block layout by parallel simulated annealing algorithms

Step by step placement strategies for building block layout

Global refinement for building block layout

Channel routing order for building-block layout with rectilinear modules

Connectivity biased channel construction and ordering for building-block layout

An optimal channel pin assignment with multiple intervals for building block layout

An integrated approach to pin assignment and global routing for VLSI building-block layout

building block layout
Recently Published Documents