From a Smart House to a Connected City: Connecting Devices Services Everywhere

The growing development of smart devices makes it possible to create new distributed applications targeted for smart spaces. The design of intelligent spaces assumes that there is an infrastructure to support the applications requirements. Many academic works have proposed middlewares that provide an abstraction for the use of network services. The network services of an smart space, such as an automated home, can have different communications interfaces. Accordingly, we developed a middleware called UDP4US (Universal Device Pipe for Ubiquitous Services) which was designed to abstract different patterns of communication, keeping the discovery of devices on a local network services. In this paper, we present a new UDP4US architecture component that aims to expose the local network devices services to the Internet. The new component was developed with the REST technology, thus the devices services can be discovered and accessed over the Internet. The new component was exhaustively tested in order to find the liits of its effectiveness. The evaluation of the new component was performed by measuring its discovery and execution times plus the success rate of the services execution exposed over the Internet. The results from the present work are important to guide a better design of distributed applications for smart places.

Joint RNA-Seq and miRNA Profiling Analyses to Reveal Molecular Mechanisms in Regulating Thickness of Pod Canopy in Brassica napus

Oilseed rape (Brassica napus) is the second largest oilseed crop worldwide. As an architecture component of B. napus, thickness of pod canopy (TPC) plays an important role in yield formation, especially under high-density cultivation conditions. However, the mechanisms underlying the regulation of TPC remain unclear. RNA and microRNA (miRNA) profiling of two groups of B. napus lines with significantly different TPC at the bolting with a tiny bud stage revealed differential expressions of numerous genes involved in nitrogen-related pathways. Expression of several nitrogen-related response genes, including ASP5, ASP2, ASN3, ATCYSC1, PAL2, APT2, CRTISO, and COX15, was dramatically changed in the thick TPC lines compared to those in the thin TPC lines. Differentially expressed miRNAs also included many involved in nitrogen-related pathways. Expression of most target genes was negatively associated with corresponding miRNAs, such as miR159, miR6029, and miR827. In addition, 12 (including miR319, miR845, and miR158) differentially expressed miRNAs between two plant tissues sampled (stem apex and flower bud) were identified, implying that they might have roles in determining overall plant architecture. These results suggest that nitrogen signaling may play a pivotal role in regulating TPC in B. napus.

Hardware Evaluation and Software Framework Construction for Performance Measurement of Embedded Processor

A frame work for analysing the capabilities and area of improvements for working of an embedded processor is constructed, and also a methodology for comparative study of simulation of processor on load and hardware results are explained in this paper. The processor can be modelled as a standalone processor or as a group of processors working together to take parallel program execution mode. The proposed frame work and simulation method uses the processor representation of current embedded processor model which is relevant in product design and devices modelling. This system utilizes the ARM processor model which consists of programs used for computing and standardizing the operational quality of a processor for any particular domain of applications. This paper presents steps for creating experimental framework which uses a simulation system running on a Linux based operating system along with kernel for running test applications on the target which is run in simulation mode. To evaluate the simulation with respect to the real hardware, this paper has made an observation of cache related performance of a typical embedded processor. The processor which is taken for the study is ARM926EJ-S processor. The future architectural components will be designed and simulated in the framework as continuation of this experiment. Their ARM9 technology equivalent design parameters for configurable modules of CPU in 1.8 micro-meter and experimental nano-meter level implementation would be calculated with architecture component design tools.

SECURITY AND AVAILABILITY MODELS FOR SMART BUILDING AUTOMATION SYSTEMS

This article presents the information on control system of smart building, which is considered as a set of subsystems including a building automation system. The paper considers the three-level architecture of the building automation system components, including FPGA, communication and management levels. It is determined that the causes of failures and inaccessibility of the BAS architecture component can be both internal system and external factors, among which software defects and vulnerabilities are identified. BAS security and availability during its life cycle are assessed using the Fault-, Attack- and Availability-Tree and Markov models. Markov model is used to develop a number of strategies which help to recover system and to eliminate all the possible threats during systems life time. The models of BAS architecture with software defects and attacked vulnerabilities with general reliability (defect) and security (vulnerability) maintenance are analyzed in detail. The recommendations on the choice of strategies and service parameters are given.