resonant clock Latest Research Papers

Resonant Clock Synchronization With Active Silicon Interposer for Multi-Die Systems

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2021.3059228 ◽

2021 ◽

pp. 1-10

Author(s):

Ragh Kuttappa ◽

Baris Taskin ◽

Scott Lerner ◽

Vasil Pano

Keyword(s):

Clock Synchronization ◽

Resonant Clock

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0.76-mW/pF/GHz, 7-GHz Quadrature Resonant Clock With Frequency Tuning Capacitor and Amplitude Control Feedback Loop

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2020.3001617 ◽

2021 ◽

Vol 68 (1) ◽

pp. 136-140

Author(s):

Chang-Soo Yoon ◽

Han-Gon Ko ◽

Byung-Jun Kang ◽

Jung-Woo Sull ◽

Deog-Kyoon Jeong

Keyword(s):

Feedback Loop ◽

Frequency Tuning ◽

Amplitude Control ◽

Tuning Capacitor ◽

Resonant Clock ◽

Control Feedback

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Performance boost of time-delay reservoir computing by non-resonant clock cycle

Neural Networks ◽

10.1016/j.neunet.2020.01.010 ◽

2020 ◽

Vol 124 ◽

pp. 158-169 ◽

Cited By ~ 2

Author(s):

Florian Stelzer ◽

André Röhm ◽

Kathy Lüdge ◽

Serhiy Yanchuk

Keyword(s):

Time Delay ◽

Clock Cycle ◽

Reservoir Computing ◽

Resonant Clock

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A verification of resonant clock driver design for the IoT era

2017 12th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT) ◽

10.1109/impact.2017.8255895 ◽

2017 ◽

Author(s):

Yasuhiro Takahashi ◽

Toshikazu Sekine ◽

Michio Yokoyama

Keyword(s):

Resonant Clock

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Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2016.2565202 ◽

2017 ◽

Vol 36 (1) ◽

pp. 146-155 ◽

Cited By ~ 1

Author(s):

Chung-Han Chou ◽

Yen-Ting Lai ◽

Yi-Chun Chang ◽

Chih-Yu Wang ◽

Liang-Chia Cheng ◽

...

Keyword(s):

Area Overhead ◽

Ping Pong ◽

Resonant Clock ◽

Surge Current

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A 5.5GHz 0.84TOPS/mm2 neural network engine with stream architecture and resonant clock mesh

2016 IEEE Asian Solid-State Circuits Conference (A-SSCC) ◽

10.1109/asscc.2016.7844153 ◽

2016 ◽

Cited By ~ 1

Author(s):

Shengshuo Lu ◽

Zhengya Zhang ◽

Marios Papaefthymiou

Keyword(s):

Neural Network ◽

Stream Architecture ◽

Resonant Clock

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Design Methodology for Synthesizing Resonant Clock Networks in the Presence of Dynamic Voltage/Frequency Scaling

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2016.2543022 ◽

2016 ◽

Vol 35 (12) ◽

pp. 2068-2081 ◽

Cited By ~ 3

Author(s):

Seyong Ahn ◽

Minseok Kang ◽

Marios C. Papaefthymiou ◽

Taewhan Kim

Keyword(s):

Design Methodology ◽

Frequency Scaling ◽

Clock Networks ◽

Dynamic Voltage ◽

Voltage Frequency ◽

Resonant Clock

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ROA-Brick Topology for Low-Skew Rotary Resonant Clock Network Design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2014.2385835 ◽

2015 ◽

Vol 23 (11) ◽

pp. 2519-2530 ◽

Cited By ~ 7

Author(s):

Ying Teng ◽

Baris Taskin

Keyword(s):

Network Design ◽

Clock Network ◽

Resonant Clock

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Resonant clock mega-mesh for the IBM z13TM

2015 Symposium on VLSI Circuits (VLSI Circuits) ◽

10.1109/vlsic.2015.7231308 ◽

2015 ◽

Cited By ~ 1

Author(s):

David Shan ◽

Phillip Restle ◽

Doug Malone ◽

Rob Groves ◽

Eric Lai ◽

...

Keyword(s):

Resonant Clock

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LC resonant clock resource minimization using compensation capacitance

2015 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2015.7168906 ◽

2015 ◽

Cited By ~ 1

Author(s):

Ping-Yao Lin ◽

Hany Ahmed Fahmy ◽

Riadul Islam ◽

Matthew R. Guthaus

Keyword(s):

Resource Minimization ◽

Resonant Clock

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resonant clock
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H-INDEX

Resonant Clock Synchronization With Active Silicon Interposer for Multi-Die Systems

0.76-mW/pF/GHz, 7-GHz Quadrature Resonant Clock With Frequency Tuning Capacitor and Amplitude Control Feedback Loop

Performance boost of time-delay reservoir computing by non-resonant clock cycle

A verification of resonant clock driver design for the IoT era

Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction

A 5.5GHz 0.84TOPS/mm2 neural network engine with stream architecture and resonant clock mesh

Design Methodology for Synthesizing Resonant Clock Networks in the Presence of Dynamic Voltage/Frequency Scaling

ROA-Brick Topology for Low-Skew Rotary Resonant Clock Network Design

Resonant clock mega-mesh for the IBM z13TM

LC resonant clock resource minimization using compensation capacitance

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resonant clockRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Resonant Clock Synchronization With Active Silicon Interposer for Multi-Die Systems

0.76-mW/pF/GHz, 7-GHz Quadrature Resonant Clock With Frequency Tuning Capacitor and Amplitude Control Feedback Loop

Performance boost of time-delay reservoir computing by non-resonant clock cycle

A verification of resonant clock driver design for the IoT era

Ping-Pong Mesh: A New Resonant Clock Design for Surge Current and Area Overhead Reduction

A 5.5GHz 0.84TOPS/mm2 neural network engine with stream architecture and resonant clock mesh

Design Methodology for Synthesizing Resonant Clock Networks in the Presence of Dynamic Voltage/Frequency Scaling

ROA-Brick Topology for Low-Skew Rotary Resonant Clock Network Design

Resonant clock mega-mesh for the IBM z13TM

LC resonant clock resource minimization using compensation capacitance

resonant clock
Recently Published Documents