rlc interconnects
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2019 ◽  
Vol 8 (3) ◽  
pp. 4965-4970

This paper presents passive shielding technique for crosstalk noise and delay reduction in resistive driven RLC interconnect. FDTD technique is used for modeling proposed geometry. The worst case delay and noise induced due to crosstalk in passive shielded interconnects are compared with unshielded lines and is validated using HSPICE simulations for 32nm global interconnects. From the results it has been demonstrated that the proposed model results and HSPICE simulations differ by 8% and by using proposed geometry crosstalk noise and delay has come down by 90% and 52% when compared to unshielded line.


This paper presents efficient geometry for crosstalk noise and delay reduction using Active shielding in RLC interconnects with resistive drivers .FDTD modeling has been used for proposed geometry and is validated by HSPICE simulations for 32nm global interconnects .From the results it has been verified that the proposed model results and HSPICE simulations differ by 5% . From the outcomes it has been confirmed that the proposed model outcomes and HSPICE outcomes differ by 5% and by using proposed geometry crosstalk noise and delay has come down by 73% and 60% when compared to unshielded line


2015 ◽  
Vol 35 (9) ◽  
pp. 3049-3065 ◽  
Author(s):  
Mummaneni Kavicharan ◽  
Nukala Suryanarayana Murthy ◽  
Nistala Bheema Rao ◽  
Addanki Prathima

2014 ◽  
Vol 56 (5) ◽  
pp. 1185-1193 ◽  
Author(s):  
Vobulapuram Ramesh Kumar ◽  
Brajesh Kumar Kaushik ◽  
Amalendu Patnaik
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