Hierarchical Scheduling of an SDF/L Graph onto Multiple Processors

Although dataflow models are known to thrive at exploiting task-level parallelism of an application, it is difficult to exploit the parallelism of data, represented well with loop structures, since these structures are not explicitly specified in existing dataflow models. SDF/L model overcomes this shortcoming by specifying the loop structures explicitly in a hierarchical fashion. We introduce a scheduling technique of an application represented by the SDF/L model onto heterogeneous processors. In the proposed method, we explore the mapping of tasks using an evolutionary meta-heuristic and schedule hierarchically in a bottom-up fashion, creating parallel loop schedules at lower levels first and then re-using them when constructing the schedule at a higher level. The efficiency of the proposed scheduling methodology is verified with benchmark examples and randomly generated SDF/L graphs.

High-throughput Near-Memory Processing on CNNs with 3D HBM-like Memory

This article discusses the high-performance near-memory neural network (NN) accelerator architecture utilizing the logic die in three-dimensional (3D) High Bandwidth Memory– (HBM) like memory. As most of the previously reported 3D memory-based near-memory NN accelerator designs used the Hybrid Memory Cube (HMC) memory, we first focus on identifying the key differences between HBM and HMC in terms of near-memory NN accelerator design. One of the major differences between the two 3D memories is that HBM has the centralized through- silicon-via (TSV) channels while HMC has distributed TSV channels for separate vaults. Based on the observation, we introduce the Round-Robin Data Fetching and Groupwise Broadcast schemes to exploit the centralized TSV channels for improvement of the data feeding rate for the processing elements. Using synthesized designs in a 28-nm CMOS technology, performance and energy consumption of the proposed architectures with various dataflow models are evaluated. Experimental results show that the proposed schemes reduce the runtime by 16.4–39.3% on average and the energy consumption by 2.1–5.1% on average compared to conventional data fetching schemes.

Software synthesis from dataflow schedule graphs

The dataflow-model of computation is widely used in design and implementation of signal processing systems. In dataflow-based design processes, scheduling—the assignment and coordination of computational modules across processing resources—is a critical task that affects practical measures of performance, including latency, throughput, energy consumption, and memory requirements. Dataflow schedule graphs (DSGs) provide a formal abstraction for representing schedules in dataflow-based design processes. The DSG abstraction allows designers to model a schedule as a separate dataflow graph, thereby providing a formal, abstract (platform- and language-independent) representation for the schedule. In this paper, we introduce a design methodology that is based on explicit specifications of application graphs and schedules as cooperating dataflow models. We also develop new techniques and tools for automatically synthesizing efficient implementations on multicore platforms from these coupled application and schedule models. We demonstrate the proposed methodology and synthesis techniques through a case study involving real-time detection of people and vehicles using acoustic and seismic sensors.

Extracting Interactive Actor-Based Dataflow Models from Legacy C Code

Graphical actor-based models provide an abstract overview of the flow of data in a system. They are well-established for the model-driven engineering (MDE) of complex software systems and are supported by numerous commercial and academic tools, such as Simulink, LabVIEW or Ptolemy. In MDE, engineers concentrate on constructing and simulating such models, before application code (or at least a large fraction thereof) is synthesized automatically. However, a significant fraction of today’s legacy system has been coded directly, often using the C language. High-level models that give a quick, accurate overview of how components interact are often out of date or do not exist. This makes it challenging to maintain or extend legacy software, in particular for new team members.To address this problem, we here propose to reverse the classic synthesis path of MDE and to synthesize actor-based dataflow models automatically from source code. Here functions in the code get synthesized into nodes that represent actors manipulating data. Second, we propose to harness the modeling-pragmatic approach, which considers visual models not as static artefacts, but allows interactive, flexible views that also link back to textual descriptions. Thus we propose to synthesize actor models that can vary in level of detail and that allow navigation in the source code. To validate and evaluate our proposals, we implemented these concepts for C analysis in the open source, Eclipse-based KIELER project and conducted a small survey.

Validation of System-level Properties at Code Level

This chapter claims that code generation can be adapted to enable the expression of system-level properties at code level, and be later proved with respect to the code semantics. All previous analyses were performed on discrete dynamical systems models. However, once the control-level properties have been expressed and analyzed at model level, their validity must be asserted on the code artifact extracted from the model. Luckily, this extraction of code from models is largely automatized thanks to autocoding framework generating embedded code from dataflow models. Indeed, code generation from dataflow language is now effective and widely used in the industry. With these in mind, the chapter first gives an overview of the modeling framework, enabling the expression of properties at model and code level. A second part explains the generation of such code annotations, while a last part focuses on their verification.