instruction set processors
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Author(s):  
Lukas Gerlach ◽  
Guillermo Payá-Vayá ◽  
Holger Blume

AbstractOn the one hand, processors for hearing aids are highly specialized for audio processing, on the other hand they have to meet challenging hardware restrictions. This paper aims to provide an overview of the requirements, architectures, and implementations of these processors. Special attention is given to the increasingly common application-specific instruction-set processors (ASIPs). The main focus of this paper lies on hardware-related aspects such as the processor architecture, the interfaces, the application specific integrated circuit (ASIC) technology, and the operating conditions. The different hearing aid implementations are compared in terms of power consumption, silicon area, and computing performance for the algorithms used. Challenges for the design of future hearing aid processors are discussed based on current trends and developments.


IEEE Access ◽  
2021 ◽  
pp. 1-1
Author(s):  
Marie-Christine Jakobs ◽  
Felix Pauck ◽  
Marco Platzner ◽  
Heike Wehrheim ◽  
Tobias Wiersema

2017 ◽  
Vol 66 (4) ◽  
pp. 647-660 ◽  
Author(s):  
Tuo Li ◽  
Muhammad Shafique ◽  
Jude Angelo Ambrose ◽  
Jorg Henkel ◽  
Sri Parameswaran

2017 ◽  
Vol 22 (2) ◽  
pp. 1-28 ◽  
Author(s):  
Ioannis Latifis ◽  
Karthick Parashar ◽  
Grigoris Dimitroulakos ◽  
Hans Cappelle ◽  
Christakis Lezos ◽  
...  

2015 ◽  
Vol 25 (03) ◽  
pp. 1640012
Author(s):  
Roberto Urban ◽  
Heinrich T. Vierhaus ◽  
Mario Schölzel ◽  
Enrico Altmann ◽  
Horst Seelig

The CoMet approach on designing application specific instruction set processors (ASIPs) is targeting a non-cyclic design space exploration (DSE). The design process is driven by a step by step refinement of intermediate codes, known from compiler backends. In every step, the intermediate code can be simulated and profiled. Based on that profiling information, it can be further transformed to an optimized or refined intermediate code. The whole transformation process is implemented in a GUI-based design tool, whose main component is a configurable simulator for intermediate codes. It will be shown how the configurable intermediate code simulator is used and how the intermediate code transformation and the VHDL generation of the ASIP model will work in the CoMet tool.


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