Double-Gate Operation of Metal Nanodot-Array-Based Single-Electron Device

Multidot single-electron devices (SEDs) can realize new types of computing technologies, such as reconfigurable and reservoir computing. The self-assembled metal nanodot-array film attached with multiple gates is a candidate for use in such SEDs to achieve high functionality. However, the single-electron properties of such a film have not yet been investigated in use with optimally controlled multiple gates because of structural complexity having many nanodots. In this study, Fe nanodot-array-based double-gate SEDs were fabricated and their single-electron properties modulated by the top- and bottom-gate voltages (VT and VB, respectively) were investigated. As reported in our previous study, the drain current (ID) exhibited clear oscillations against VB (i.e., Coulomb blockade oscillation) in a part of the devices, originating from a single dot among several dots. The phase of the Coulomb blockade oscillation systematically shifted with VT, indicating that the charge state of the single dot was clearly controlled by both the gate voltages despite the multidot structure and the metal multidot SED has potential for logic-gate operation. The top and bottom gates affected the electronic state of the dot unevenly owing to the geometrical effect caused by the dot shape and size of the surrounding dots.

Conductance peaks and gaps in single-electron device with the presence of electron-electron interaction - “Nonequilibrium green function approach”

Consider a single-electron transistor (SET) with a small size quantum dot (QD), where confined energy and the Coulomb interaction control the charges adding to QD. In this paper, a theoretical analysis of the relation between source-drain voltage and gate voltage has been done to define quantum-Coulomb blocked (and unblocked) diamonds for QD that has N electrons. An analytical equation for the conductance has been derived using the non-equilibrium Green function technique (NEGFT). Further, the effect of QD size and the tunnelling rate on conductance peaks and gaps have been investigated. Finally, the effect of gate voltage on conductance peaks and gaps with respect the quantum-Coulomb blocked regions has been analysed.

Measuring of an unknown voltage by using single electron transistor based voltmeter

In engineering and science, high operating speed, low power consumption, and high integration density equipment are financially indispensable. Single electron device (SED) is one such equipment. SEDs are capable of controlling the transport of only one electron through the tunneling transistor. It is single electron that is sufficient to store information in SED. Power consumed in the single electron circuit is very low in comparison with CMOS circuits. The processing speed of single electron transistor (SET) based device will be nearly close to electronic speed. SET attracts the researchers, scientists or technologists to design and implement large scale circuits for the sake of the consumption of ultra-low power and its small size. All the incidences for the case of a SET-based circuit happen when only a single electron tunnels through the transistors under the proper applied bias voltage and a small gate voltage or multiple gate voltages. For implementing a single electron transistor based voltmeter circuit, SET would be the best candidate to fulfil the requirements of it. Ultra-low noise is generated during tunneling SEDs. A D Flip-Flop is implemented and based on this, two kinds of registers like sequence register and сode register are made.