nanometer technology Latest Research Papers

A Technique of Designing Low Leakage Latch-Type Sense Amplifier in Nanometer Technology

10.1109/conecct52877.2021.9622623 ◽

2021 ◽

Author(s):

Krishna. R ◽

Punithavathi Duraiswamy

Keyword(s):

Sense Amplifier ◽

Low Leakage ◽

Nanometer Technology

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Design of Thermal-Aware and Power-Efficient LFSR on Different Nanometer Technology FPGA for Green Communication

2021 10th IEEE International Conference on Communication Systems and Network Technologies (CSNT) ◽

10.1109/csnt51715.2021.9509637 ◽

2021 ◽

Author(s):

Keshav Kumar ◽

Shivani Malhotra ◽

Rubina Dutta ◽

Amit Kumar

Keyword(s):

Green Communication ◽

Power Efficient ◽

Nanometer Technology

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Design of Compact and Smart Full Adders for High-Speed Nanometer Technology IC’s

Journal of Physics Conference Series ◽

10.1088/1742-6596/1804/1/012152 ◽

2021 ◽

Vol 1804 (1) ◽

pp. 012152

Author(s):

K Mariya Priyadarshini ◽

R S Ernest Ravindran ◽

S. Vamsee Krishna ◽

K Durga Bhavani

Keyword(s):

High Speed ◽

Nanometer Technology

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Novel Radiation Hardened Memory Cell Design for Nanometer Technology

2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) ◽

10.1109/icsict49897.2020.9278182 ◽

2020 ◽

Author(s):

Li-Yi Xiao ◽

Hong-Chen Li ◽

Jie Li ◽

He Liu

Keyword(s):

Memory Cell ◽

Cell Design ◽

Radiation Hardened ◽

Nanometer Technology

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Design and Performance Evaluation of Highly Efficient Adders in Nanometer Technology

Lecture Notes in Electrical Engineering - Advances in VLSI, Communication, and Signal Processing ◽

10.1007/978-981-15-6840-4_20 ◽

2020 ◽

pp. 251-261

Author(s):

Prashasti ◽

Shivangi Jaiswal ◽

Anam Khan ◽

Subodh Wairya

Keyword(s):

Performance Evaluation ◽

Highly Efficient ◽

Nanometer Technology ◽

And Performance

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Power Efficient UART Desing Using Capactive Load on Different Nanometer Technology FPGA

Gyancity Journal of Engineering and Technology ◽

10.21058/gjet.2019.52001 ◽

2019 ◽

Vol 5 (2) ◽

pp. 1-13

Author(s):

Keshav Kumar ◽

◽

D M Akbar Hussain ◽

Bishwajeet Pandey

Keyword(s):

Power Efficient ◽

Nanometer Technology

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Frequency Scaled Green Data Flip Flop on Different Nanometer Technology Based FPGA

Gyancity Journal of Electronics and Computer Science ◽

10.21058/gjecs.2019.41001 ◽

2019 ◽

Vol 4 (1) ◽

Author(s):

Keshav Kumar ◽

Bishwajeet Pandey ◽

Srishti Priya Chaturvedi

Keyword(s):

Flip Flop ◽

Nanometer Technology

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Low Power UART Design Using Different Nanometer Technology Based FPGA

2018 8th International Conference on Communication Systems and Network Technologies (CSNT) ◽

10.1109/csnt.2018.8820281 ◽

2018 ◽

Cited By ~ 1

Author(s):

Keshav Kumar ◽

Amanpreet Kaur ◽

Bishwajeet Pandey ◽

S.N. Panda

Keyword(s):

Low Power ◽

Nanometer Technology

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Implementation of Elliptical Curve Point Multiplication Over Galois Field (GF(p)) in 45 Nanometer Technology

Sensor Letters ◽

10.1166/sl.2018.4005 ◽

2018 ◽

Vol 16 (8) ◽

pp. 632-641 ◽

Cited By ~ 2

Author(s):

S. Baskar ◽

V. R. Sarma Dhulipala

Keyword(s):

Galois Field ◽

Point Multiplication ◽

Nanometer Technology

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Multivariate Adaptive Regression Splines in Standard Cell Characterization for Nanometer Technology in Semiconductor

Topics in Splines and Applications ◽

10.5772/intechopen.74854 ◽

2018 ◽

Author(s):

Taizhi Liu

Keyword(s):

Multivariate Adaptive Regression Splines ◽

Regression Splines ◽

Standard Cell ◽

Cell Characterization ◽

Adaptive Regression ◽

Nanometer Technology ◽

Adaptive Regression Splines

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nanometer technology
Recently Published Documents

TOTAL DOCUMENTS

H-INDEX

A Technique of Designing Low Leakage Latch-Type Sense Amplifier in Nanometer Technology

Design of Thermal-Aware and Power-Efficient LFSR on Different Nanometer Technology FPGA for Green Communication

Design of Compact and Smart Full Adders for High-Speed Nanometer Technology IC’s

Novel Radiation Hardened Memory Cell Design for Nanometer Technology

Design and Performance Evaluation of Highly Efficient Adders in Nanometer Technology

Power Efficient UART Desing Using Capactive Load on Different Nanometer Technology FPGA

Frequency Scaled Green Data Flip Flop on Different Nanometer Technology Based FPGA

Low Power UART Design Using Different Nanometer Technology Based FPGA

Implementation of Elliptical Curve Point Multiplication Over Galois Field (GF(p)) in 45 Nanometer Technology

Multivariate Adaptive Regression Splines in Standard Cell Characterization for Nanometer Technology in Semiconductor

Export Citation Format

nanometer technologyRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

A Technique of Designing Low Leakage Latch-Type Sense Amplifier in Nanometer Technology

Design of Thermal-Aware and Power-Efficient LFSR on Different Nanometer Technology FPGA for Green Communication

Design of Compact and Smart Full Adders for High-Speed Nanometer Technology IC’s

Novel Radiation Hardened Memory Cell Design for Nanometer Technology

Design and Performance Evaluation of Highly Efficient Adders in Nanometer Technology

Power Efficient UART Desing Using Capactive Load on Different Nanometer Technology FPGA

Frequency Scaled Green Data Flip Flop on Different Nanometer Technology Based FPGA

Low Power UART Design Using Different Nanometer Technology Based FPGA

Implementation of Elliptical Curve Point Multiplication Over Galois Field (GF(p)) in 45 Nanometer Technology

Multivariate Adaptive Regression Splines in Standard Cell Characterization for Nanometer Technology in Semiconductor

nanometer technology
Recently Published Documents