Leakage Power Reduction for Deeply-Scaled FinFET Circuits Operating in Multiple Voltage Regimes Using Fine-Grained Gate-Length Biasing Technique

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 ◽

10.7873/date.2015.0520 ◽

2015 ◽

Cited By ~ 8

Author(s):

Ji Li ◽

Qing Xie ◽

Yanzhi Wang ◽

Shahin Nazarian ◽

Massoud Pedram

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Gate Length ◽

Fine Grained

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Runtime Leakage Power Reduction Using Loop Unrolling and Fine Grained Power Gating

Journal of Low Power Electronics ◽

10.1166/jolpe.2015.1361 ◽

2015 ◽

Vol 11 (1) ◽

pp. 16-36

Author(s):

Sumanta Pyne ◽

Ajit Pal

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Power Gating ◽

Fine Grained ◽

Loop Unrolling

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Loop unrolling with fine grained power gating for runtime leakage power reduction

18th International Symposium on VLSI Design and Test ◽

10.1109/isvdat.2014.6881084 ◽

2014 ◽

Author(s):

Sumanta Pyne ◽

Ajit Pal

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Power Gating ◽

Fine Grained ◽

Loop Unrolling

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Leakage power reduction for coarse grained dynamically reconfigurable processor arrays with fine grained Power Gating technique

2008 International Conference on Field-Programmable Technology ◽

10.1109/fpt.2008.4762410 ◽

2008 ◽

Cited By ~ 12

Author(s):

Yoshiki Saito ◽

Tomoaki Shirai ◽

Takuro Nakamura ◽

Takashi Nishimura ◽

Yohei Hasegawa ◽

...

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Coarse Grained ◽

Power Gating ◽

Reconfigurable Processor ◽

Dynamically Reconfigurable ◽

Fine Grained ◽

Processor Arrays

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Multi-gate-length versus dual-gate-length biasing for active mode leakage power reduction: Benchmarking and modeling

2009 IEEE 8th International Conference on ASIC ◽

10.1109/asicon.2009.5351283 ◽

2009 ◽

Author(s):

Qiang Chen ◽

Sridhar Tirumala

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Gate Length ◽

Active Mode ◽

Dual Gate

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LEAKAGE POWER REDUCTION USING MULTI MODAL DRIVEN HIERARCHICAL POWER MODE SWITCHES

i-manager s Journal on Circuits and Systems ◽

10.26634/jcir.6.2.14291 ◽

2018 ◽

Vol 6 (2) ◽

pp. 1

Author(s):

SEKHAR REDDY M. CHANDRA ◽

REDDY P. RAMANA ◽

◽

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Power Mode

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Effect of leakage power reduction techniques on combinational circuits

2015 Online International Conference on Green Engineering and Technologies (IC-GET) ◽

10.1109/get.2015.7453862 ◽

2015 ◽

Author(s):

M. Manoranjani ◽

T. Ravi ◽

R. Ramya

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Combinational Circuits ◽

Reduction Techniques

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Exploring the limits of leakage power reduction in caches

ACM Transactions on Architecture and Code Optimization ◽

10.1145/1089008.1089009 ◽

2005 ◽

Vol 2 (3) ◽

pp. 221-246 ◽

Cited By ~ 30

Author(s):

Yan Meng ◽

Timothy Sherwood ◽

Ryan Kastner

Keyword(s):

Power Reduction ◽

Leakage Power

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Leakage power reduction in CMOS modulo4 adder and modulo4 multiplier in sub-micron technology

International Conference on Sustainable Energy and Intelligent Systems (SEISCON 2011) ◽

10.1049/cp.2011.0430 ◽

2011 ◽

Author(s):

M.J. Rani ◽

S. Malarkkan

Keyword(s):

Power Reduction ◽

Leakage Power

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Fine-Grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-threshold-Voltage Transistors

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.11 ◽

2009 ◽

Cited By ~ 5

Author(s):

Masashi Imai ◽

Kouei Takada ◽

Takashi Nanya

Keyword(s):

Threshold Voltage ◽

Reduction Method ◽

Power Reduction ◽

Leakage Power ◽

Fine Grain

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Robust SAT-Based Search Algorithm for Leakage Power Reduction

Lecture Notes in Computer Science - Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/3-540-45716-x_17 ◽

2002 ◽

pp. 167-177 ◽

Cited By ~ 27

Author(s):

Fadi A. Aloul ◽

Soha Hassoun ◽

Karem A. Sakallah ◽

David Blaauw

Keyword(s):

Search Algorithm ◽

Power Reduction ◽

Leakage Power

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