A Novel Evolutionary Design of Sequential Logic Circuits by Using Genetic Algorithm

Author(s):  
P. Soleimani ◽  
S. Mirzakuchaki ◽  
K. Mohammadi ◽  
M. Bagheri
2012 ◽  
Vol 14 (2) ◽  
pp. 191-219 ◽  
Author(s):  
Yanyun Tao ◽  
Yuzhen Zhang ◽  
Jian Cao ◽  
Yalong Huang

Author(s):  
Cecília Reis ◽  
◽  
J. A. Tenreiro Machado ◽  
J. Boaventura Cunha ◽  

This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: 2-to-1 multiplexer, one-bit full adder, four-bit parity checker and a two-bit multiplier. The objective of this work is to generate a functional circuit with the minimum number of gates.


1993 ◽  
Vol 140 (6) ◽  
pp. 327-332
Author(s):  
M.-D. Shieh ◽  
C.-L. Wey ◽  
P.D. Fisher

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