scholarly journals Improvement on the electron transport efficiency of the carbon nanotube field effect transistor device by introducing heterogeneous-dual-metal-gate structure

2013 ◽  
Vol 62 (14) ◽  
pp. 147308
Author(s):  
Liu Xing-Hui ◽  
Zhao Hong-Liang ◽  
Li Tian-Yu ◽  
Zhang Ren ◽  
Li Song-Jie ◽  
...  
Keyword(s):  
Carbon Nanotube ◽  
Electron Transport ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Metal Gate ◽  
Transport Efficiency ◽  
Gate Structure ◽  
Effect Transistor ◽  
Dual Metal

Short-Channel Tunneling Field-Effect Transistor with Drain-Overlap and Dual-Metal Gate Structure for Low-Power and High-Speed Operations

2015 ◽  
Vol 15 (10) ◽  
pp. 7430-7435 ◽  
Author(s):  
Young Jun Yoon ◽  
Hye Rim Eun ◽  
Jae Hwa Seo ◽  
Hee-Sung Kang ◽  
Seong Min Lee ◽  
...  
Keyword(s):  
Low Power ◽  
Field Effect ◽  
High Speed ◽  
Field Effect Transistor ◽  
Tunneling Current ◽  
Metal Gate ◽  
Short Channel ◽  
Gate Structure ◽  
Effect Transistor ◽  
Dual Metal

We have investigated and proposed a highly scaled tunneling field-effect transistor (TFET) based on Ge/GaAs heterojunction with a drain overlap to suppress drain-induced barrier thinning (DIBT) and improve low-power (LP) performance. The highly scaled TFET with a drain overlap achieves lower leakage tunneling current because of the decrease in tunneling events between the source and drain, whereas a typical short-channel TFET suffers from a great deal of tunneling leakage current due to the DIBT at the off-state. However, the drain overlap inevitably increases the gate-to-drain capacitance (Cgd) because of the increase in the overlap capacitance (Cov) and inversion capacitance (Cinv). Thus, in this work, a dual-metal gate structure is additionally applied along with the drain overlap. The current performance and the total gate capacitance (Cgg) of the device with a dual-metal gate can be possibly controlled by adjusting the metal gate workfunction (Φgate) and Φoverlap-gate in the overlapping regions. As a result, the intrinsic delay time (τ) is greatly reduced by obtaining lower Cgg divided by the on-state current (Ion), i.e., Cgg/Ion. We have successfully demonstrated excellent LP and high-speed performance of a highly scaled TFET by adopting both drain overlap and dual-metal gate with DIBT minimization.

scholarly journals A Novel Gate-Normal Tunneling Field-Effect Transistor With Dual-Metal Gate

2018 ◽  
Vol 6 ◽  
pp. 1070-1076 ◽  
Author(s):  
Stefan Glass ◽  
Kimihiko Kato ◽  
Lidia Kibkalo ◽  
Jean-Michel Hartmann ◽  
Shinichi Takagi ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Metal Gate ◽  
Effect Transistor ◽  
Dual Metal

Comparison of sensitivities of carbon nanotube field-effect transistor biosensors with and without top metal gate

2008 ◽  
Vol 104 (10) ◽  
pp. 104304 ◽  
Author(s):  
Masuhiro Abe ◽  
Katsuyuki Murata ◽  
Tatsuaki Ataka ◽  
Kazuhiko Matsumoto
Keyword(s):  
Carbon Nanotube ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Metal Gate ◽  
Effect Transistor

scholarly journals Study of Work-Function Variation on Performance of Dual-Metal Gate Fin Field-Effect Transistor

2020 ◽  
Author(s):  
Tianyu Yu ◽  
Liang Dai ◽  
Zhifeng Zhao ◽  
Weifeng Lyu ◽  
Mi Lin
Keyword(s):  
Work Function ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Metal Gate ◽  
Statistical Fluctuations ◽  
Effect Transistor ◽  
Dual Metal ◽  
Aided Design ◽  
The Impact

The impact of work-function variation (WFV) on performance of an inversion-mode (IM) dual-metal gate (DMG) fin field-effect transistor (FinFET) was investigated for the first time. The statistical fluctuations induced by WFV on the threshold-voltage (VTH), transconductance (gm), and subthreshold slope (SS) were demonstrated and estimated utilizing a 3D technology computer-aided design (TCAD) simulator. We found that the performance variations of the DMG FinFET were affected by two different metals near the drain and near the source, respectively. Additionally, this effect of the two metals on the channel was not monotonic with the length of the channel of their own control. Our work fills a gap in the study of WFV for a DMG IM FinFET and provides a reference for optimizing the distribution of the two metals.

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