scholarly journals Hardware Implementation of a Real-Time Image Data Compression for Satellite Remote Sensing

Author(s):  
Albert Lin
2012 ◽  
Vol 27 (03) ◽  
pp. 383-392 ◽  
Author(s):  
Andreas Hartmann ◽  
Oleg Akimov ◽  
Stephen Morris ◽  
Christian Fulda

1996 ◽  
Author(s):  
Marc W. Crooks ◽  
Charles Capps ◽  
Eric Hawkins ◽  
Michael Wesley

2019 ◽  
Vol 28 ◽  
pp. 01046
Author(s):  
Paweł Kowalski ◽  
Robert Smyk

The paper presents design and hardware implementation of real-time image filtering for overhead wires detection divided on image processing and results presentation blocks. The image processing block was separated from the whole implementation, and its delay and hardware complexity was analysed. Also the maximum frequency of image processing of the proposed implementation was estimated.


2011 ◽  
Vol 179-180 ◽  
pp. 257-263
Author(s):  
Biao Zhang ◽  
Yue Huan Wang

It is double-buses modularized structure with the combination of system control bus and high speed image data bus which is put forward in this paper. Moreover, the management and distribution of image data bus and the design of system reset procedure are elaborated through which a kind of practical real-time image processing system with the strongest adaptability and capability for structure programming and system expansion. The computing capability in infrared test of small target is greatly improved which is verified in tri DSP model system. According to complex image processing task, through the adjustment of parallel structure of image processing algorithm, the higher parallel efficiency can be realized. So to say, the system structure has a great adjustment to algorithm parallel structure and can be successfully used as a platform for universal real-time image processing.


2018 ◽  
Vol 15 (3) ◽  
pp. 435-438
Author(s):  
Chen Chen ◽  
Wei Li ◽  
Lianru Gao ◽  
Hengchao Li ◽  
Javier Plaza

2012 ◽  
Vol 6-7 ◽  
pp. 542-546
Author(s):  
Bao Feng Zhang ◽  
Yi Yang ◽  
Jun Chao Zhu ◽  
Cui Li

To solve the traditional image processing system problem such as large in size, high power consumption and poor real-time, an embedded real-time image processing system is designed based on TMS320DM6446+FPGA architecture. DM6446 as the core of the system is responsible for the scheduling, image processing algorithms, image output; field programmable gate array (FPGA) is responsible for capturing real-time image data, image preprocessing. The paper describes the principle of the real-time image processing system. The experiment proved that the system can achieve real-time acquisition, processing and output of image data in 20 frames per second.


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